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PIC12F1572T-I
Public Made by Adomby adom
Microchip Tech MICROCHIP, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPIC12F1572T-I
Microchip Tech · MICROCHIP · SOIC-8
PIC12F1572T-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply; 2.3V to 5.5V for PIC12F1572 (1.8V to 3.6V for PIC12LF1572). |
| 2 | RA5 | bidirectional | General purpose I/O with weak pull-up and interrupt-on-change; also T1CKI, CLKIN (EC mode external clock input), and alternate RX/DT, CWG1A, PWM1 via APFCON. |
| 3 | RA4 | bidirectional | General purpose I/O with weak pull-up and interrupt-on-change; also AN3 ADC input, C1IN1- comparator input, T1G, CLKOUT (FOSC/4), and alternate TX/CK, CWG1B, PWM2 via APFCON. |
| 4 | RA3/MCLR/VPP | input | Input-only pin with IOC and weak pull-up; Master Clear reset with internal pull-up, programming voltage VPP, or T1G alternate. |
| 5 | RA2 | bidirectional | General purpose I/O with weak pull-up and interrupt-on-change; also AN2 ADC input, C1OUT, T0CKI, CWG1FLT, CWG1A, PWM3 and INT external interrupt. |
| 6 | RA1/ICSPCLK | bidirectional | General purpose I/O with weak pull-up and IOC; also AN1, VREF+ ADC reference input, C1IN0-, RX/DT, PWM1, and ICSP programming clock/ICDCLK in-circuit debug clock. |
| 7 | RA0/ICSPDAT | bidirectional | General purpose I/O with weak pull-up and IOC; also AN0, C1IN+, DAC output, TX/CK, CWG1B, PWM2, and ICSP data I/O/ICDDAT in-circuit debug data. |
| 8 | VSS | power_in | Ground reference. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Embedded Processors & Controllers |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage on VDD pin (PIC12F1571/2) | VDD | -0.3 | 6.5 | V | with respect to VSS | 259 | |
| Voltage on MCLR pin | -0.3 | 9 | V | with respect to VSS | 259 | ||
| Ambient temperature under bias | -40 | 125 | °C | 259 | |||
| Storage temperature | -65 | 150 | °C | 259 | |||
| Maximum current on VSS pin | 250 | mA | -40°C ≤ TA ≤ +85°C | 259 | |||
| Maximum current on VDD pin | 250 | mA | -40°C ≤ TA ≤ +85°C | 259 | |||
| Current sunk by any standard I/O pin | 50 | mA | 259 | ||||
| Current sourced by any standard I/O pin | 50 | mA | 259 | ||||
| Clamp current | IK | 20 | mA | VPIN < 0 or VPIN > VDD | 259 | ||
| Operating supply voltage | VDD | 2.3 | 5.5 | V | FOSC ≤ 16 MHz | 262 | |
| Operating supply voltage | VDD | 2.5 | 5.5 | V | FOSC ≤ 32 MHz (Note 3) | 262 | |
| Operating ambient temperature, industrial | TA | -40 | 85 | °C | Industrial Temperature | 260 | |
| RAM Data Retention Voltage | VDR | 1.7 | V | Device in Sleep mode | 262 | ||
| FVR Gain Voltage Accuracy for ADC | VADFVR | -4 | 4 | % | 1x VFVR, ADFVR = 01, VDD ≥ 2.5V | 262 | |
| FVR Gain Voltage Accuracy for Comparator | VCDAFVR | -4 | 4 | % | 1x VFVR, CDAFVR = 01, VDD ≥ 2.5V | 262 | |
| VDD Rise Rate | SVDD | 0.05 | V/ms | Ensures that the Power-on Reset signal is released properly | 262 | ||
| Supply current, FOSC = 1 MHz ECM | IDD | 91 | 120 | µA | VDD = 3.0V, FOSC = 1 MHz, External Clock (ECM), Medium Power mode | 264 | |
| Supply current, FOSC = 16 MHz HFINTOSC | IDD | 1.1 | 1.3 | mA | VDD = 3.0V, FOSC = 16 MHz, HFINTOSC | 264 | |
| Supply current, FOSC = 32 MHz HFINTOSC | IDD | 2.1 | 2.5 | mA | VDD = 3.0V, FOSC = 32 MHz, HFINTOSC (Note 3) | 265 | |
| Base power-down current, Low-Power Sleep | IPD | 0.3 | 3 | µA | VDD = 3.0V, WDT, BOR and FVR disabled, all peripherals inactive, VREGPM = 1, Max +85°C | 266 | |
| WDT current | IPD | 0.6 | 1.9 | µA | VDD = 3.0V, Max +85°C | 266 | |
| Input Low Voltage, TTL buffer | VIL | 0.8 | V | 4.5V ≤ VDD ≤ 5.5V | 268 | ||
| Input High Voltage, TTL buffer | VIH | 2 | V | 4.5V ≤ VDD ≤ 5.5V | 268 | ||
| Input Leakage Current, I/O ports | IIL | -125 | 125 | nA | VSS ≤ VPIN ≤ VDD, Pin at high-impedance, +85°C | 268 | |
| Input Leakage Current, MCLR | IIL | -200 | 200 | nA | VSS ≤ VPIN ≤ VDD, Pin at high-impedance, +85°C | 268 | |
| Weak Pull-up Current | IPUR | 25 | 140 | 300 | µA | VDD = 5.0V, VPIN = VSS | 268 |
| Output Low Voltage, I/O ports | VOL | 0.6 | V | IOL = 8 mA, VDD = 5V | 268 | ||
| Capacitive loading on I/O output pins | CIO | 50 | pF | 268 | |||
| Voltage on MCLR/VPP pin for programming | VIHH | 8 | 9 | V | 269 | ||
| Self-timed write cycle time | TIW | 2 | 2.5 | ms | 269 | ||
| External CLKIN frequency, ECH | FOSC | 0 | 20 | MHz | External Clock (ECH) | 272 | |
| External CLKIN period | TOSC | 50 | ns | External Clock (EC) | 272 | ||
| Brown-out Reset Voltage, BORV = 0 | VBOR | 2.55 | 2.7 | 2.85 | V | BORV = 0 | 276 |
| Brown-out Reset Voltage, BORV = 1 | VBOR | 2.35 | 2.45 | 2.58 | V | BORV = 1 (PIC12F1571/2) | 276 |
| Low-Power Brown-out Reset Voltage | VLPBOR | 1.8 | 2.1 | 2.5 | V | LPBOR = 1 | 276 |
| Power-up Timer Period | TPWRT | 40 | 65 | 140 | ms | PWRTE = 0 | 276 |
| ADC Integral Error | EIL | 1 | 1.7 | LSb | VREF = 3.0V | 278 | |
| ADC Offset Error | EOFF | 1 | 2.5 | LSb | VREF = 3.0V | 278 | |
| ADC Gain Error | EGN | 1 | 2 | LSb | VREF = 3.0V | 278 | |
| ADC Reference Voltage | VREF | 1.8 | V | VREF = (VRPOS, VRNEG) (Note 4) | 278 | ||
| ADC Clock Period | TAD | 1 | 6 | µs | FOSC-based | 280 | |
| Comparator Input Offset Voltage | VIOFF | 7.5 | 60 | mV | CxSP = 1, VICM = VDD/2 | 281 | |
| Thermal Resistance Junction to Ambient, SOIC | θJA | 149.5 | °C/W | 8-pin SOIC package | 270 | ||
| Thermal Resistance Junction to Case, SOIC | θJC | 39.9 | °C/W | 8-pin SOIC package | 270 | ||
| Maximum Junction Temperature | TJMAX | 150 | °C | 270 | |||
| Power-on Reset Release Voltage | VPOR | 1.6 | V | 262 | |||
| Fixed Voltage Reference Voltage | VFVR | 1.024 | V | -40°C ≤ TA ≤ +85°C | 262 | ||
| Internal calibrated HFINTOSC frequency | HFOSC | 16 | MHz | VDD = 3.0V, TA = 25°C, ±2% tolerance | 273 |
CAD (KiCad official)
- Symbol:
PIC12F1572T-I - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
pic12f1572t-i-etched.step/pic12f1572t-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic12f1572t-i.step/pic12f1572t-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (334 pp, sha256
e946825cd9e6101e, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).