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PIC12F1572-E

Microchip Tech · Pre-ordered MCUs · SOIC-8

PIC12F1572-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive supply; the PIC12F1572 operating voltage range is stated as 2.3V to 5.5V.
2 RA5 bidirectional General purpose I/O, also serving as T1CKI Timer1 clock input, CLKIN external clock input in EC mode, and PWM1 output.
3 RA4 bidirectional General purpose I/O, also serving as AN3 ADC channel input, T1G Timer1 gate input, and CLKOUT FOSC/4 output.
4 RA3 input General purpose input with IOC and WPU; input-only pin that also serves as MCLR with internal pull-up and as VPP programming voltage.
5 RA2 bidirectional General purpose I/O, also serving as AN2 ADC channel input, C1OUT comparator output, T0CKI Timer0 clock input, and INT external interrupt.
6 RA1 bidirectional General purpose I/O, also serving as AN1 ADC channel input, VREF+ ADC voltage reference input, C1IN0- comparator negative input, and ICSPCLK ICSP programming clock.
7 RA0 bidirectional General purpose I/O, also serving as AN0 ADC channel input, C1IN+ comparator positive input, DACOUT, and ICSPDAT ICSP data I/O.
8 VSS power_in Ground reference.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Embedded Processors & Controllers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD, FOSC <= 16 MHz VDD 2.3 5.5 V FOSC <= 16 MHz 262
Supply voltage VDD, FOSC <= 32 MHz VDD 2.5 5.5 V FOSC <= 32 MHz (Note 3, PLL required) 262
Operating supply voltage VDDMIN VDD 2.3 V PIC12F1571/2 VDDMIN (FOSC <= 16 MHz) 260
Operating supply voltage VDDMAX VDD 5.5 V PIC12F1571/2 VDDMAX 260
Operating ambient temperature, industrial TA -40 85 C Industrial temperature range 260
Operating ambient temperature, extended TA -40 125 C Extended temperature range 260
Ambient temperature under bias -40 125 C 259
Storage temperature -65 150 C 259
Voltage on VDD pin, PIC12F1571/2 VDD -0.3 6.5 V with respect to VSS 259
Voltage on MCLR pin MCLR -0.3 9 V with respect to VSS 259
Voltage on all other pins -0.3 V with respect to VSS; upper limit printed as VDD + 0.3V 259
Maximum current on VSS pin 250 mA -40C <= TA <= +85C 259
Maximum current on VSS pin 85 mA +85C <= TA <= +125C 259
Maximum current on VDD pin 250 mA -40C <= TA <= +85C 259
Maximum current on VDD pin 85 mA +85C <= TA <= +125C 259
Sunk by any standard I/O pin 50 mA 259
Sourced by any standard I/O pin 50 mA 259
Clamp current IK 20 mA VPIN < 0 or VPIN > VDD 259
Input low voltage, I/O ports with TTL buffer VIL 0.8 V 4.5V <= VDD <= 5.5V 268
Input high voltage, I/O ports with TTL buffer VIH 2 V 4.5V <= VDD <= 5.5V 268
Output low voltage, I/O ports VOL 0.6 V IOL = 8 mA, VDD = 5V 268
Input leakage current, I/O ports IIL -125 125 nA VSS <= VPIN <= VDD, pin at high-impedance, +85C 268
Input leakage current, I/O ports IIL -1000 1000 nA VSS <= VPIN <= VDD, pin at high-impedance, +125C 268
Input leakage current, MCLR IIL -200 200 nA VSS <= VPIN <= VDD, pin at high-impedance, +85C 268
Weak pull-up current IPUR 25 100 200 µA VDD = 3.3V, VPIN = VSS 268
Capacitive loading on all I/O pins CIO 50 pF 268
RAM data retention voltage VDR 1.7 V Device in Sleep mode 262
VDD rise rate SVDD 0.05 V/ms Ensures that the Power-on Reset signal is released properly 262
Brown-out Reset voltage, BORV = 0 VBOR 2.55 2.7 2.85 V BORV = 0 276
Brown-out Reset voltage, BORV = 1 (PIC12F1571/2) VBOR 2.35 2.45 2.58 V BORV = 1 (PIC12F1571/2) 276
Brown-out Reset hysteresis VHYST 0 25 60 mV -40C <= TA <= +85C 276
Low-Power Brown-out Reset voltage VLPBOR 1.8 2.1 2.5 V LPBOR = 1 276
Power-up Timer period TPWRT 40 65 140 ms PWRTE = 0 276
MCLR pulse width (low) TMCL 2 s 276
FOSC to CLKOUT TosH2ckL 70 ns 3.3V <= VDD <= 5.0V 274
External CLKIN frequency, ECL FOSC 0.5 MHz External Clock (ECL) 272
External CLKIN frequency, ECM FOSC 4 MHz External Clock (ECM) 272
External CLKIN frequency, ECH FOSC 20 MHz External Clock (ECH) 272
External CLKIN period TOSC 50 ns External Clock (EC) 272
Oscillator frequency range F10 4 8 MHz 273
On-chip VCO system frequency F11 16 32 MHz 273
PLL start-up time (lock time) TRC 2 ms 273
HFINTOSC frequency tolerance OS08 -2 2 % VDD = 3.0V, TA = 25C 273
HFINTOSC frequency tolerance OS08 -5 5 % Over VDD and temperature range (Figure 26-6) 273
ADC integral error EIL -1.7 1.7 LSb VREF = 3.0V 278
ADC gain error EGN -2 2 LSb VREF = 3.0V 278
ADC reference voltage VREF 1.8 V VREF = (VRPOS - VRNEG) 278
Comparator response time, rising edge TRESP 400 800 ns CxSP = 1 281
Comparator response time, falling edge TRESP 200 400 ns CxSP = 1 281
Characteristic retention TRETD 40 Year Provided no other specifications are violated 269
Power-down/operating current, LFINTOSC 31 kHz IDD 13 21 µA VDD 2.3V; FOSC = 31 kHz, LFINTOSC, -40C <= TA <= +85C 264
FVR gain voltage accuracy for ADC, 1x VADFVR -4 4 % 1x VFVR, ADFVR = 01, VDD 2.5V 262
FVR gain voltage accuracy for ADC, 2x VADFVR -4 4 % 2x VFVR, ADFVR = 10, VDD 2.5V 262
FVR gain voltage accuracy for ADC, 4x VADFVR -4 4 % 4x VFVR, ADFVR = 11, VDD 4.75V 262
Fixed Voltage Reference voltage VFVR 1.024 V -40C <= TA <= +85C 262
Power-on Reset release voltage VPOR 1.6 V 262
Thermal resistance junction to ambient, 8-pin SOIC JA 149.5 C/W 8-pin SOIC package 270

CAD (KiCad official)

  • Symbol: PIC12F1572-E
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: pic12f1572-e-etched.step / pic12f1572-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic12f1572-e.step / pic12f1572-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (334 pp, sha256 c28be7d052c3bf4f, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF