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PIC12F1571-I

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Microchip Tech MICROCHIP, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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PIC12F1571-I

Microchip Tech · MICROCHIP · SOIC-8

PIC12F1571-I from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive supply; the datasheet gives 2.3V to 5.5V for PIC12F1571 and 1.8V to 3.6V for PIC12LF1571.
2 RA5 bidirectional General purpose I/O, also selectable as T1CKI, RX, DT, CWG1A, PWM1 and CLKIN (EC clock input) via APFCON.
3 RA4 bidirectional General purpose I/O, also AN3, C1IN1-, T1G, TX, CK, CWG1B, PWM2 and CLKOUT (FOSC/4 output).
4 RA3 input Input-only general purpose pin with IOC and weak pull-up; it is also the MCLR master clear input with internal pull-up and the VPP programming voltage pin.
5 RA2 bidirectional General purpose I/O, also AN2 ADC input, C1OUT, T0CKI, CWG1FLT, CWG1A, PWM3 and external interrupt INT.
6 RA1 bidirectional General purpose I/O, also AN1, VREF+ ADC reference input, C1IN0-, RX, DT, PWM1, ICSPCLK and ICDCLK.
7 RA0 bidirectional General purpose I/O, also AN0, C1IN+, DACOUT, TX, CK, CWG1B, PWM2, ICSPDAT and ICDDAT.
8 VSS power_in Ground reference.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Embedded Processors & Controllers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating supply voltage VDD 2.3 5.5 V FOSC ≤ 16 MHz 262
Operating supply voltage VDD 2.5 5.5 V FOSC ≤ 32 MHz (PLL required) 262
Operating ambient temperature, industrial TA -40 85 °C Industrial temperature range 260
Voltage on VDD pin VDD -0.3 6.5 V on VDD pin, PIC12F1571/2 259
Voltage on MCLR pin -0.3 9 V on MCLR pin 259
Voltage on all other pins -0.3 V on all other pins, max (VDD + 0.3V) 259
Storage temperature -65 150 °C 259
Ambient temperature under bias -40 125 °C 259
Maximum current on VSS pin 250 mA on VSS pin, -40°C ≤ TA ≤ +85°C 259
Maximum current on VSS pin 85 mA on VSS pin, +85°C ≤ TA ≤ +125°C 259
Maximum current on VDD pin 250 mA on VDD pin, -40°C ≤ TA ≤ +85°C 259
Maximum current on VDD pin 85 mA on VDD pin, +85°C ≤ TA ≤ +125°C 259
Current sunk by any standard I/O pin 50 mA 259
Current sourced by any standard I/O pin 50 mA 259
Clamp current IK 20 mA VPIN < 0 or VPIN > VDD 259
RAM data retention voltage VDR 1.7 V Device in Sleep mode 262
VDD rise rate SVDD 0.05 V/ms Ensures that the Power-on Reset signal is released properly 262
FVR gain voltage accuracy for ADC VADFVR -4 4 % 1x VFVR, ADFVR = 01, VDD ≥ 2.5V 262
FVR gain voltage accuracy for comparator VCDAFVR -4 4 % 1x VFVR, CDAFVR = 01, VDD ≥ 2.5V 262
Input low voltage, SMbus levels VIL 0.8 V with SMbus levels, 2.7V ≤ VDD ≤ 5.5V 268
Input low voltage, TTL buffer VIL 0.8 V 4.5V ≤ VDD ≤ 5.5V 268
Input high voltage, TTL buffer VIH 2 V 4.5V ≤ VDD ≤ 5.5V 268
Input high voltage, SMbus levels VIH 2.1 V with SMbus levels, 2.7V ≤ VDD ≤ 5.5V 268
Input leakage current, I/O ports IIL -125 125 nA VSS ≤ VPIN ≤ VDD, pin at high-impedance, +85°C 268
Input leakage current, MCLR IIL -200 200 nA VSS ≤ VPIN ≤ VDD, pin at high-impedance, +85°C 268
Weak pull-up current IPUR 25 100 200 µA VDD = 3.3V, VPIN = VSS 268
Weak pull-up current IPUR 25 140 300 µA VDD = 5.0V, VPIN = VSS 268
Output low voltage, I/O ports VOL 0.6 V IOL = 8 mA, VDD = 5V 268
Capacitive loading on all I/O pins CIO 50 pF All I/O pins 268
Supply current, FOSC 1 MHz ECM IDD 68 93 µA VDD 2.3 V, FOSC = 1 MHz, External Clock (ECM), Medium Power mode 264
Supply current, FOSC 4 MHz ECM IDD 174 221 µA VDD 2.3 V, FOSC = 4 MHz, External Clock (ECM), Medium Power mode 264
Supply current, LFINTOSC 31 kHz IDD 13 21 µA VDD 2.3 V, FOSC = 31 kHz, LFINTOSC, -40°C ≤ TA ≤ +85°C 264
Base power-down current, low-power Sleep IPD 0.2 0.9 µA WDT, BOR and FVR disabled, all peripherals inactive, Low-Power Sleep mode, VREGPM = 1 266
Base power-down current, normal-power Sleep IPD 9 14 µA WDT, BOR and FVR disabled, all peripherals inactive, Normal Power Sleep mode, VREGPM = 0 266
Programming voltage on MCLR/VPP VIHH 8 9 V (Note 2) 269
Program Flash cell endurance EP 10 K E/W -40°C ≤ TA ≤ +85°C (Note 1) 269
High-endurance Flash cell endurance EHEFC 100 K E/W 0°C ≤ TA ≤ +60°C, lower byte last 128 addresses 269
Self-timed write cycle time TIW 2 2.5 ms 269
External CLKIN frequency, ECL FOSC 0.5 MHz External Clock (ECL) 272
External CLKIN frequency, ECM FOSC 4 MHz External Clock (ECM) 272
External CLKIN frequency, ECH FOSC 20 MHz External Clock (ECH) 272
External CLKIN period TOSC 50 ns External Clock (EC) 272
Oscillator frequency range F10 FOSC 4 8 MHz 273
On-chip VCO system frequency F11 FSYS 16 32 MHz 273
HFINTOSC frequency tolerance OS08 HFOSC -2 2 % VDD = 3.0V, TA = 25°C (Note 2) 273
HFINTOSC wake-up from Sleep start-up time OS10 TWARM 5 15 µs 273
MCLR pulse width (low) TMCL 2 µs 276
Low-power watchdog timer time-out period TWDTLP 10 16 27 ms VDD = 3.3V-5V, 1:512 prescaler used 276
Power-up timer period TPWRT 40 65 140 ms PWRTE = 0 276
Brown-out Reset voltage, BORV = 0 VBOR 2.55 2.7 2.85 V BORV = 0 276
Brown-out Reset voltage, BORV = 1 (PIC12F1571/2) VBOR 2.35 2.45 2.58 V BORV = 1 (PIC12F1571/2) 276
Brown-out Reset hysteresis VHYST 0 25 60 mV -40°C ≤ TA ≤ +85°C 276
Low-power Brown-out Reset voltage VLPBOR 1.8 2.1 2.5 V LPBOR = 1 276
FVR output voltage VFVR 1.024 V -40°C ≤ TA ≤ +85°C 262
Power-on Reset release voltage VPOR 1.6 V 262
Internal LFINTOSC frequency OS09 LFOSC 31 kHz 273
Thermal resistance junction to ambient, 8-pin SOIC θJA 149.5 C/W 8-pin SOIC package 270
Thermal resistance junction to case, 8-pin SOIC θJC 39.9 C/W 8-pin SOIC package 270
Maximum junction temperature TJMAX 150 °C 270

CAD (KiCad official)

  • Symbol: PIC12F1571-I
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: pic12f1571-i-etched.step / pic12f1571-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pic12f1571-i.step / pic12f1571-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (334 pp, sha256 c28be7d052c3bf4f, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF