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PIC12F1501-E
Public Made by Adomby adom
Microchip Tech Microcontrollers (MCU/MPU/SOC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPIC12F1501-E
Microchip Tech · Microcontrollers (MCU/MPU/SOC) · SOIC-8
PIC12F1501-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply pin; the PIC12F1501 operating voltage range is stated as 2.3V to 5.5V. |
| 2 | RA5 | bidirectional | General purpose I/O (TTL input, CMOS output) that can also serve as the CLKIN external clock input in EC mode, Timer1 clock input (T1CKI), and alternate outputs such as CWG1A, NCO1, CLC2 and PWM4. |
| 3 | RA4 | bidirectional | General purpose I/O (TTL input, CMOS output) that can also serve as ADC channel AN3, comparator C1 negative input, CLKOUT (FOSC/4 output) when enabled, PWM3 output, and Timer1 gate input T1G. |
| 4 | MCLR/VPP/RA3 | input | RA3 is an input-only general purpose pin; when MCLRE is enabled it acts as Master Clear (MCLR) with internal pull-up, and it also carries the high-voltage programming input VPP and the Timer1 gate input T1G. |
| 5 | RA2 | bidirectional | General purpose I/O (Schmitt Trigger input, CMOS output) that can also serve as ADC channel AN2, comparator C1 output, DAC output DACOUT2, Timer0 clock input T0CKI, external interrupt INT, PWM1 output, and CWG Fault input CWG1FLT. |
| 6 | RA1 | bidirectional | General purpose I/O (TTL input, CMOS output) that can also serve as ADC channel AN1, ADC positive reference VREF+, comparator C1 negative input, NCO1 output, and the ICSP programming clock ICSPCLK. |
| 7 | RA0 | bidirectional | General purpose I/O (TTL input, CMOS output) that can also serve as ADC channel AN0, comparator C1 positive input, DAC output DACOUT1, CWG1B output, PWM2 output, and the ICSP data pin ICSPDAT. |
| 8 | VSS | power_in | Ground reference pin for the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Embedded Processors & Controllers |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient temperature under bias | TA | -40 | 125 | °C | 209 | ||
| Storage temperature | TSTG | -65 | 150 | °C | 209 | ||
| Voltage on VDD pin with respect to VSS | VDD | -0.3 | 6.5 | V | PIC12F1501 | 209 | |
| Voltage on MCLR pin with respect to VSS | -0.3 | 9 | V | 209 | |||
| Voltage on all other pins with respect to VSS | -0.3 | V | Printed maximum is (VDD + 0.3V); not numeric | 209 | |||
| Maximum current on VSS pin | 250 | mA | -40°C ≤ TA ≤ +85°C | 209 | |||
| Maximum current on VSS pin | 85 | mA | +85°C ≤ TA ≤ +125°C | 209 | |||
| Maximum current on VDD pin | 250 | mA | -40°C ≤ TA ≤ +85°C | 209 | |||
| Maximum current on VDD pin | 85 | mA | +85°C ≤ TA ≤ +125°C | 209 | |||
| Current sunk by any standard I/O pin | 50 | mA | 209 | ||||
| Current sourced by any standard I/O pin | 50 | mA | 209 | ||||
| Clamp current, IK | IK | 20 | mA | VPIN < 0 or VPIN > VDD | 209 | ||
| Operating ambient temperature range (TA) | TA | -40 | 125 | °C | Extended Temperature | 210 | |
| Supply voltage VDD (PIC12F1501) | VDD | 2.3 | 5.5 | V | FOSC ≤ 16 MHz | 212 | |
| Supply voltage VDD (PIC12F1501) | VDD | 2.5 | 5.5 | V | FOSC ≤ 20 MHz | 212 | |
| RAM Data Retention Voltage | VDR | 1.7 | V | Device in Sleep mode | 212 | ||
| Fixed Voltage Reference Voltage | VFVR | -11 | 7 | % | 1x, 2x, 4x gain (1.024V, 2.048V, 4.096V nominal); 1x and 2x: VDD ≥ 2.5V, -40°C ≤ TA ≤ +85°C; 4x: VDD ≥ 4.75V, -40°C ≤ TA ≤ +85°C | 212 | |
| VDD Rise Rate | SVDD | 0.05 | V/ms | Ensures that the Power-on Reset signal is released properly. | 212 | ||
| Brown-out Reset Voltage, BORV = 0 | VBOR | 2.55 | 2.7 | 2.85 | V | BORV = 0 | 225 |
| Brown-out Reset Voltage, BORV = 1 (PIC12F1501) | VBOR | 2.35 | 2.45 | 2.58 | V | BORV = 1 (PIC12F1501) | 225 |
| Brown-out Reset Hysteresis | VHYST | 0 | 25 | 75 | mV | -40°C ≤ TA ≤ +85°C | 225 |
| Low-Power Brown-Out Reset Voltage | VLPBOR | 1.8 | 2.1 | 2.5 | V | LPBOR = 1 | 225 |
| Input Low Voltage, I/O port with TTL buffer | VIL | 0.8 | V | 4.5V ≤ VDD ≤ 5.5V | 218 | ||
| Input High Voltage, I/O port with TTL buffer | VIH | 2 | V | 4.5V ≤ VDD ≤ 5.5V | 218 | ||
| Input Leakage Current, I/O ports | IIL | -125 | 125 | nA | VSS ≤ VPIN ≤ VDD, Pin at high-impedance, 85°C | 218 | |
| Input Leakage Current, I/O ports | IIL | -1000 | 1000 | nA | VSS ≤ VPIN ≤ VDD, Pin at high-impedance, 125°C | 218 | |
| Input Leakage Current, MCLR | IIL | -200 | 200 | nA | VSS ≤ VPIN ≤ VDD, Pin at high-impedance, 85°C | 218 | |
| Weak Pull-up Current | IPUR | 25 | 100 | 200 | µA | VDD = 3.3V, VPIN = VSS | 218 |
| Weak Pull-up Current | IPUR | 25 | 140 | 300 | µA | VDD = 5.0V, VPIN = VSS | 218 |
| Output Low Voltage, I/O ports | VOL | 0.6 | V | IOL = 8 mA, VDD = 5V | 218 | ||
| Capacitive loading, all I/O pins | CIO | 50 | pF | All I/O pins | 218 | ||
| Supply current IDD (characterized, not tested) | IDD | 85 | 140 | µA | VDD 3.0V; FOSC = 1 MHz, External Clock (ECM), Medium Power mode | 214 | |
| Supply current IDD (characterized, not tested) | IDD | 240 | 365 | µA | VDD 3.0V; FOSC = 4 MHz, External Clock (ECM), Medium Power mode | 214 | |
| Supply current IDD | IDD | 15 | 30 | µA | VDD 3.0V; FOSC = 31 kHz, LFINTOSC, -40°C ≤ TA ≤ +85°C | 214 | |
| Supply current IDD | IDD | 300 | 500 | µA | VDD 3.0V; FOSC = 500 kHz, HFINTOSC | 214 | |
| Supply current IDD (characterized, not tested) | IDD | 660 | 1100 | µA | VDD 3.0V; FOSC = 8 MHz, HFINTOSC | 214 | |
| Supply current IDD | IDD | 1000 | 1550 | µA | VDD 3.0V; FOSC = 16 MHz, HFINTOSC | 214 | |
| Supply current IDD | IDD | 1060 | 1600 | µA | VDD 3.0V; FOSC = 20 MHz, External Clock (ECH), High-Power mode | 215 | |
| Supply current IDD | IDD | 15 | 31 | µA | VDD 3.0V; FOSC = 32 kHz, External Clock (ECL), Low-Power mode | 215 | |
| Supply current IDD | IDD | 38 | 65 | µA | VDD 3.0V; FOSC = 500 kHz, External Clock (ECL), Low-Power mode | 215 | |
| Base IPD, Low-Power Sleep mode | IPD | 0.3 | 4 | µA | VDD 3.0V; Max. +85°C; WDT, BOR, FVR and SOSC disabled, all peripherals inactive | 216 | |
| Base IPD, Low-Power Sleep mode | IPD | 0.3 | 12 | µA | VDD 3.0V; Max. +125°C; WDT, BOR, FVR and SOSC disabled, all peripherals inactive | 216 | |
| Base IPD, Normal Power Sleep mode (VREGPM = 0) | IPD | 11 | 18 | µA | VDD 3.0V; Max. +85°C; WDT, BOR, FVR and SOSC disabled, all peripherals inactive | 216 | |
| Base IPD, Normal Power Sleep mode (VREGPM = 0) | IPD | 11 | 20 | µA | VDD 3.0V; Max. +125°C; WDT, BOR, FVR and SOSC disabled, all peripherals inactive | 216 | |
| WDT Current | IPD | 0.53 | 7 | µA | VDD 3.0V; Max. +85°C | 216 | |
| WDT Current | IPD | 0.53 | 20 | µA | VDD 3.0V; Max. +125°C | 216 | |
| FVR Current | IPD | 19 | 35 | µA | VDD 3.0V; Max. +85°C | 216 | |
| FVR Current | IPD | 19 | 37 | µA | VDD 3.0V; Max. +125°C | 216 | |
| BOR Current | IPD | 7 | 17 | µA | VDD 3.0V; Max. +85°C | 216 | |
| BOR Current | IPD | 7 | 30 | µA | VDD 3.0V; Max. +125°C | 216 | |
| ADC Current, no conversion in progress | IPD | 0.35 | 5 | µA | VDD 3.0V; Max. +85°C; ADC clock source FRC | 217 | |
| ADC Current, no conversion in progress | IPD | 0.35 | 13 | µA | VDD 3.0V; Max. +125°C; ADC clock source FRC | 217 | |
| Comparator Current, CxSP = 0 | IPD | 18 | 37 | µA | VDD 3.0V; Max. +85°C | 217 | |
| Comparator Current, CxSP = 0 | IPD | 18 | 38 | µA | VDD 3.0V; Max. +125°C | 217 | |
| Thermal Resistance Junction to Ambient, 8-pin SOIC | JA | 149.5 | °C/W | Operating temperature -40°C ≤ TA ≤ +125°C; 8-pin SOIC package | 219 | ||
| Thermal Resistance Junction to Case, 8-pin SOIC | JC | 39.9 | °C/W | Operating temperature -40°C ≤ TA ≤ +125°C; 8-pin SOIC package | 219 | ||
| Maximum Junction Temperature | TJMAX | 150 | °C | Operating temperature -40°C ≤ TA ≤ +125°C | 219 |
CAD (KiCad official)
- Symbol:
PIC12F1501-E - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
pic12f1501-e-etched.step/pic12f1501-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic12f1501-e.step/pic12f1501-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (292 pp, sha256
9797df2bbfe0cc6e, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).