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PIC10F202T-I
Public Made by Adomby adom
Microchip Tech Microcontrollers (MCU/MPU/SOC), SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PIC10F202T-I
Microchip Tech · Microcontrollers (MCU/MPU/SOC) · SOT-23-6
PIC10F202T-I from Microchip Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GP0/ICSPDAT | bidirectional | Bidirectional I/O pin with software-selectable weak pull-up and wake-up on pin change; also the In-Circuit Serial Programming data pin (Schmitt trigger input). |
| 2 | VSS | power_in | Ground reference for logic and I/O pins. |
| 3 | GP1/ICSPCLK | bidirectional | Bidirectional I/O pin with software-selectable weak pull-up and wake-up on pin change; also the In-Circuit Serial Programming clock pin (Schmitt trigger input). |
| 4 | GP2/T0CKI/FOSC4 | bidirectional | Bidirectional I/O pin that also serves as the TMR0 clock input (T0CKI, Schmitt trigger) or the oscillator/4 (FOSC4) CMOS output. |
| 5 | VDD | power_in | Positive supply for logic and I/O pins, 2.0V to 5.5V. |
| 6 | GP3/MCLR/VPP | input | Input-only pin with optional weak pull-up and wake-up on pin change; as MCLR it is the active-low reset (weak pull-up always on, must not exceed VDD in normal operation or the device enters programming mode), and VPP is the programming voltage input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-6 |
| Category | Embedded Processors & Controllers |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient temperature under bias | -40 | 125 | °C | 65 | |||
| Storage temperature | -65 | 150 | °C | 65 | |||
| VDD voltage relative to VSS | VDD | 0 | 6.5 | V | Relative to VSS | 65 | |
| MCLR pin voltage relative to VSS | 0 | 13.5 | V | Relative to VSS | 65 | ||
| Voltage on other pins relative to VSS | -0.3 | V | Relative to VSS; upper limit printed as VDD + 0.3V | 65 | |||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0 or VI > VDD | 65 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VDD | 65 | |
| Maximum sink current per I/O pin | 25 | mA | 65 | ||||
| Maximum source current per I/O pin | 25 | mA | 65 |
CAD (KiCad official)
- Symbol:
PIC10F202T-I - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
pic10f202t-i-etched.step/pic10f202t-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic10f202t-i.step/pic10f202t-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (96 pp, sha256
97d6a14bf2f0f379, retrieved 2026-10-16, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PIC10F202T-I
**Microchip Tech** · Microcontrollers (MCU/MPU/SOC) · SOT-23-6
PIC10F202T-I from Microchip Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GP0/ICSPDAT | bidirectional | Bidirectional I/O pin with software-selectable weak pull-up and wake-up on pin change; also the In-Circuit Serial Programming data pin (Schmitt trigger input). |
| 2 | VSS | power_in | Ground reference for logic and I/O pins. |
| 3 | GP1/ICSPCLK | bidirectional | Bidirectional I/O pin with software-selectable weak pull-up and wake-up on pin change; also the In-Circuit Serial Programming clock pin (Schmitt trigger input). |
| 4 | GP2/T0CKI/FOSC4 | bidirectional | Bidirectional I/O pin that also serves as the TMR0 clock input (T0CKI, Schmitt trigger) or the oscillator/4 (FOSC4) CMOS output. |
| 5 | VDD | power_in | Positive supply for logic and I/O pins, 2.0V to 5.5V. |
| 6 | GP3/MCLR/VPP | input | Input-only pin with optional weak pull-up and wake-up on pin change; as MCLR it is the active-low reset (weak pull-up always on, must not exceed VDD in normal operation or the device enters programming mode), and VPP is the programming voltage input. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOT-23-6 |
| Category | Embedded Processors & Controllers |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient temperature under bias | | -40 | | 125 | °C | | 65 |
| Storage temperature | | -65 | | 150 | °C | | 65 |
| VDD voltage relative to VSS | VDD | 0 | | 6.5 | V | Relative to VSS | 65 |
| MCLR pin voltage relative to VSS | | 0 | | 13.5 | V | Relative to VSS | 65 |
| Voltage on other pins relative to VSS | | -0.3 | | | V | Relative to VSS; upper limit printed as VDD + 0.3V | 65 |
| Input clamp current | IIK | -20 | | 20 | mA | VI < 0 or VI > VDD | 65 |
| Output clamp current | IOK | -20 | | 20 | mA | VO < 0 or VO > VDD | 65 |
| Maximum sink current per I/O pin | | | | 25 | mA | | 65 |
| Maximum source current per I/O pin | | | | 25 | mA | | 65 |
## CAD (KiCad official)
- Symbol: `PIC10F202T-I`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `pic10f202t-i-etched.step` / `pic10f202t-i-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pic10f202t-i.step` / `pic10f202t-i.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586200708357476352) (96 pp, sha256 `97d6a14bf2f0f379`, retrieved 2026-10-16, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pic10f202t-i-datasheet.pdf)