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PI4MSD5V9543ALEX

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Diodes Incorporated Signal Switches, Multiplexers, Decoders, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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PI4MSD5V9543ALEX

Diodes Incorporated · Signal Switches, Multiplexers, Decoders · TSSOP-14

PI4MSD5V9543ALEX from Diodes Incorporated, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Hardware address input 0, which has no internal pull-up and must be pulled HIGH or LOW.
2 A1 input Hardware address input 1, which has no internal pull-up and must be pulled HIGH or LOW.
3 RESET input Active LOW reset input that resets the registers and I2C-bus state machine and deselects all channels when held LOW for at least tw(rst)L; it must be connected to VCC through a pull-up resistor.
4 INT0 input Active LOW interrupt input 0 for channel 0, reflected in control register bit INT0; if unused it must be connected to VCC through a pull-up resistor and must not be left floating.
5 SD0 bidirectional Serial data line for downstream channel 0, which is 5 V tolerant.
6 SC0 bidirectional Serial clock line for downstream channel 0, which is 5 V tolerant.
7 GND power_in Ground supply.
8 INT1 input Active LOW interrupt input 1 for channel 1, reflected in control register bit INT1; if unused it must be connected to VCC through a pull-up resistor and must not be left floating.
9 SD1 bidirectional Serial data line for downstream channel 1, which is 5 V tolerant.
10 SC1 bidirectional Serial clock line for downstream channel 1, which is 5 V tolerant.
11 INT output Open-drain active LOW interrupt output that goes LOW when any interrupt input is active, acting as the AND of INT0 and INT1; a pull-up resistor is required when the driving device is open-drain or can be 3-stated.
12 SCL bidirectional I2C-bus serial clock line, 5 V tolerant, which must be pulled up to a positive supply through a resistor.
13 SDA bidirectional I2C-bus serial data line, 5 V tolerant, which must be pulled up to a positive supply through a resistor.
14 VCC power_in Positive supply voltage from 1.65 V to 5.5 V; it also limits the maximum high voltage passed by the pass gates.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package TSSOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (VCCA positive DC supply) VCC 1.65 5.5 V 2
Enable control pin voltage VEN 5.5 V 2
I/O pin voltage VIO 5.5 V 2
Input transition rise or fall time Δt /ΔV 10 ns/V 2
Operating temperature range TA -40 85 °C 2
Storage temperature -55 125 °C 2
Supply voltage port B -0.5 6 V 2
Supply voltage port A -0.5 6 V 2
DC input voltage -0.5 6 V 2
Control input voltage (EN) -0.5 6 V 2
Total power dissipation 100 mW 2
Input current (EN, VCCA, VCCB, GND) 50 mA 2
ICC supply current (operating mode) ICC 65 100 uA operating mode; no load; VI = VCC or GND; fSCL = 100 kHz; VCC 3.6 V to 5.5 V 3
ICC supply current (operating mode) ICC 20 50 uA operating mode; no load; VI = VCC or GND; fSCL = 100 kHz; VCC 2.3 V to 3.6 V 3
ICC supply current (operating mode) ICC 10 30 uA operating mode; no load; VI = VCC or GND; fSCL = 100 kHz; VCC 1.65 V to 2.3 V 3
Standby current Istb 0.3 1 uA standby mode; no load; VI = VCC or GND; fSCL = 0 kHz; VCC 3.6 V to 5.5 V 3
Standby current Istb 0.1 1 uA standby mode; no load; VI = VCC or GND; fSCL = 0 kHz; VCC 2.3 V to 3.6 V 3
Power-on reset voltage VPOR 1.3 1.5 V no load; VI = VCC or GND; VCC 3.6 V to 5.5 V 3
LOW-level input voltage (SCL, SDA) VIL -0.5 V VCC 1.65 V to 5.5 V 3
HIGH-level input voltage (SCL, SDA) VIH 6 V VCC 1.65 V to 2 V 3
LOW-level output current (SDA) IOL 3 mA VOL = 0.4 V; VCC 1.65 V to 5.5 V 3
LOW-level output current (SDA) IOL 6 mA VOL = 0.6 V; VCC 1.65 V to 5.5 V 3
LOW-level input current (SCL, SDA) IIL -1 1 uA VI = GND; VCC 1.65 V to 5.5 V 3
HIGH-level input current (SCL, SDA) IIH -1 1 uA VI = VCC; VCC 1.65 V to 5.5 V 3
Input capacitance (SCL, SDA) Ci 9 10 pF VI = GND; VCC 3.6 V to 5.5 V 3
ON-state resistance Ron 4 9 24 Ω VO = 0.4 V; IO = 15 mA; VCC 4.5 V to 5.5 V 3
ON-state resistance Ron 5 11 31 Ω VO = 0.4 V; IO = 15 mA; VCC 3 V to 3.6 V 3
ON-state resistance Ron 7 16 55 Ω VO = 0.4 V; IO = 10 mA; VCC 2.3 V to 2.7 V 3
ON-state resistance Ron 9 20 70 Ω VO = 0.4 V; IO = 10 mA; VCC 1.65 V to 2 V 3
Pass switch output voltage Vpass 2.8 4.5 V Vin = VCC; Iout = -100uA; VCC 4.5 V to 5.5 V 3
Pass switch output voltage Vpass 1.6 2.8 V Vin = VCC; Iout = -100uA; VCC 3 V to 3.6 V 3
Pass switch output voltage Vpass 1.1 2 V Vin = VCC; Iout = -100uA; VCC 2.3 V to 2.7 V 3
Pass switch output voltage Vpass 0.54 1.3 V Vin = VCC; Iout = -100uA; VCC 1.65 V to 2 V 3
Leakage current IL -1 1 uA VI = VCC or GND; VCC 1.65 V to 5.5 V 3
Input/output capacitance Cio 3 5 pF VI = VCC or GND; VCC 1.65 V to 5.5 V 3
LOW-level input voltage (A0, A1, INT0, INT1) VIL -0.5 V VCC 1.65 V to 5.5 V 4
HIGH-level input voltage (A0, A1, INT0, INT1) VIH 6 V VCC 1.65 V to 5.5 V 4
LOW-level input current (A0, A1, INT0, INT1) IIL -1 1 uA VI = GND; VCC 1.65 V to 5.5 V 4
Input capacitance (A0, A1, INT0, INT1) Ci 3 5 pF VI = GND; VCC 1.65 V to 5.5 V 4
LOW-level output current (INT) IOL 3 mA VOL = 0.4 V; VCC 1.65 V to 5.5 V 4
I2C clock frequency (fast mode) fscl 0 400 kHz Fast mode I2C bus 5
I2C clock high time (as printed) tLow 1.3 μs Fast mode I2C bus 5
I2C clock low time (as printed) tHigh 0.6 μs Fast mode I2C bus 5
I2C spike time tSP 50 ns Fast mode I2C bus 5
I2C serial-data setup time tSU:DAT 100 ns Fast mode I2C bus 5
I2C serial-data hold time tHD:DAT 0 μs Fast mode I2C bus 5
I2C input rise time tr 300 ns Fast mode I2C bus 5
I2C input fall time tf 300 ns Fast mode I2C bus 5
I2C bus free time between stop and start tBUF 1.3 μs Fast mode I2C bus 5
I2C start or repeated start condition setup tSU:STA 0.6 μs Fast mode I2C bus 5
I2C start or repeated start condition hold tHD:STA 0.6 μs Fast mode I2C bus 5
I2C stop condition setup tSU:STO 0.6 μs Fast mode I2C bus 5
Valid-data time (high to low) tVD:DAT 1 μs SCL low to SDA output low valid; Fast mode I2C bus 5
Valid-data time (low to high) tVD:DAT 0.6 μs SCL low to SDA output high valid; Fast mode I2C bus 5
Valid-data time of ACK condition tVD:ACK 1 μs ACK signal from SCL low to SDA output low; Fast mode I2C bus 5
I2C bus capacitive load Cb 400 pF Fast mode I2C bus 5

CAD (KiCad official)

  • Symbol: PI4MSD5V9543ALEX
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: pi4msd5v9543alex-etched.step / pi4msd5v9543alex-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pi4msd5v9543alex.step / pi4msd5v9543alex.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (14 pp, sha256 72504df0d5489153, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF