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PI4IOE5V9539LEX
Public Made by Adomby adom
Diodes Incorporated I/O Expanders, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PI4IOE5V9539LEX
Diodes Incorporated · I/O Expanders · TSSOP-24
PI4IOE5V9539LEX from Diodes Incorporated, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INT | output | Active-low open-drain interrupt output, activated when a port pin configured as an input changes state. |
| 2 | A1 | input | Address input 1, which together with A0 sets the fixed I2C-bus address (up to four devices on one bus). |
| 3 | RESET | input | Active-low reset input; driving it LOW resets the state machine and registers to defaults, with a minimum pulse width of 25 ns. |
| 4 | IO0_0 | bidirectional | Port 0 input/output 0, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 5 | IO0_1 | bidirectional | Port 0 input/output 1, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 6 | IO0_2 | bidirectional | Port 0 input/output 2, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 7 | IO0_3 | bidirectional | Port 0 input/output 3, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 8 | IO0_4 | bidirectional | Port 0 input/output 4, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 9 | IO0_5 | bidirectional | Port 0 input/output 5, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 10 | IO0_6 | bidirectional | Port 0 input/output 6, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 11 | IO0_7 | bidirectional | Port 0 input/output 7, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 12 | GND | power_in | Ground, 0 V reference. |
| 13 | IO1_0 | bidirectional | Port 1 input/output 0, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 14 | IO1_1 | bidirectional | Port 1 input/output 1, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 15 | IO1_2 | bidirectional | Port 1 input/output 2, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 16 | IO1_3 | bidirectional | Port 1 input/output 3, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 17 | IO1_4 | bidirectional | Port 1 input/output 4, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 18 | IO1_5 | bidirectional | Port 1 input/output 5, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 19 | IO1_6 | bidirectional | Port 1 input/output 6, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 20 | IO1_7 | bidirectional | Port 1 input/output 7, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 21 | A0 | input | Address input 0, which together with A1 sets the fixed I2C-bus address. |
| 22 | SCL | input | Serial clock line input, 0 to 400 kHz, with noise filter. |
| 23 | SDA | bidirectional | Serial data line, open-drain, with noise filter on the input. |
| 24 | VCC | power_in | Supply voltage, 2.3 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | TSSOP-24 |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 24 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2.3 | 5.5 | V | 3 | ||
| Supply current | ICC | 135 | 200 | μA | Operating mode; VCC = 5.5 V; no load; fSCL= 100 kHz | 3 | |
| Standby current (VI=GND) | Istb | 0.25 | 1 | uA | Standby mode; VCC = 5.5 V; no load; VI = GND; fSCL= 0 kHz; I/O = inputs | 3 | |
| Standby current (VI=VCC) | Istb | 0.25 | 1 | μA | Standby mode; VCC = 5.5 V; no load; VI = VCC; fSCL= 0 kHz; I/O = inputs | 3 | |
| Power-on reset voltage | VPOR | 1.16 | 1.41 | V | 3 | ||
| SCL/SDA low level input voltage | VIL | -0.5 | 0.3 | V | max is +0.3VCC | 3 | |
| SCL/SDA high level input voltage | VIH | 0.7 | 5.5 | V | min is 0.7VCC | 3 | |
| SDA low level output current | IOL | 3 | mA | VOL=0.4V | 3 | ||
| SCL/SDA leakage current | IL | -1 | 1 | μA | VI=VCC=GND | 3 | |
| SCL/SDA input capacitance | Ci | 6 | 10 | pF | VI =GND | 3 | |
| I/O low level input voltage | VIL | -0.5 | 0.81 | V | 4 | ||
| I/O high level input voltage | VIH | 1.8 | 5.5 | V | 4 | ||
| I/O low level output current | IOL | 8 | 9 | mA | VCC = 2.3 V to 5.5 V; VOL = 0.5 V | 4 | |
| I/O low level output current | IOL | 10 | 11 | mA | VCC= 2.3 V to 5.5 V; VOL = 0.7 V | 4 | |
| High level output voltage | VOH | 1.8 | V | IOH=-8mA;VCC=2.3V | 4 | ||
| High level output voltage | VOH | 1.7 | V | IOH=-10mA;VCC=2.3V | 4 | ||
| High level output voltage | VOH | 2.6 | V | IOH=-8mA;VCC=3.0V | 4 | ||
| High level output voltage | VOH | 2.5 | V | IOH=-10mA;VCC=3.0V | 4 | ||
| High level output voltage | VOH | 4.1 | V | IOH=-8mA;VCC=4.75V | 4 | ||
| High level output voltage | VOH | 4 | V | IOH=-10mA;VCC=4.75V | 4 | ||
| High level input leakage current | ILIH | 1 | μA | VCC=5.5V; VI=VCC | 4 | ||
| Low level input leakage current | ILIL | -1 | μA | VCC=5.5V; VI=GND | 4 | ||
| I/O input capacitance | Ci | 3.7 | 10 | pF | 4 | ||
| I/O output capacitance | Co | 3.7 | 10 | pF | 4 | ||
| INT low level output current | IOL | 3 | mA | VOL=0.4V | 4 | ||
| A0,A1,RESET low level input voltage | VIL | -0.5 | 0.81 | V | 4 | ||
| A0,A1,RESET high level input voltage | VIH | 1.8 | 5.5 | V | 4 | ||
| A0,A1,RESET input leakage current | IL | -1 | 1 | μA | 4 | ||
| SCL clock frequency (standard mode) | fSCL | 0 | 100 | kHz | Standard mode I2C | 5 | |
| SCL clock frequency (fast mode) | fSCL | 0 | 400 | kHz | Fast mode I2C | 5 | |
| Bus free time STOP to START (standard) | tBUF | 4.7 | μs | Standard mode I2C | 5 | ||
| Bus free time STOP to START (fast) | tBUF | 1.3 | μs | Fast mode I2C | 5 | ||
| Hold time repeated START (standard) | tHD;STA | 4 | μs | Standard mode I2C | 5 | ||
| Hold time repeated START (fast) | tHD;STA | 0.6 | μs | Fast mode I2C | 5 | ||
| Set-up time repeated START (standard) | tSU;STA | 4.7 | μs | Standard mode I2C | 5 | ||
| Set-up time repeated START (fast) | tSU;STA | 0.6 | μs | Fast mode I2C | 5 | ||
| Set-up time STOP (standard) | tSU;STO | 4 | μs | Standard mode I2C | 5 | ||
| Set-up time STOP (fast) | tSU;STO | 0.6 | μs | Fast mode I2C | 5 | ||
| Data valid acknowledge time (standard) | tVD;ACK | 3.45 | μs | Standard mode I2C | 5 | ||
| Data valid acknowledge time (fast) | tVD;ACK | 0.9 | μs | Fast mode I2C | 5 | ||
| Data hold time (standard) | tHD;DAT | 0 | ns | Standard mode I2C | 5 | ||
| Data hold time (fast) | tHD;DAT | 0 | ns | Fast mode I2C | 5 | ||
| Data valid time (standard) | tVD;DAT | 3.45 | ns | Standard mode I2C | 5 | ||
| Data valid time (fast) | tVD;DAT | 0.9 | ns | Fast mode I2C | 5 | ||
| Data set-up time (standard) | tSU;DAT | 250 | ns | Standard mode I2C | 5 | ||
| Data set-up time (fast) | tSU;DAT | 100 | ns | Fast mode I2C | 5 | ||
| LOW period of SCL (standard) | tLOW | 4.7 | μs | Standard mode I2C | 5 | ||
| LOW period of SCL (fast) | tLOW | 1.3 | μs | Fast mode I2C | 5 | ||
| HIGH period of SCL (standard) | tHIGH | 4 | μs | Standard mode I2C | 5 | ||
| HIGH period of SCL (fast) | tHIGH | 0.6 | μs | Fast mode I2C | 5 | ||
| Fall time SDA and SCL | tf | 300 | ns | Standard and fast mode I2C | 5 | ||
| Rise time SDA and SCL (standard) | tr | 1000 | ns | Standard mode I2C | 5 | ||
| Rise time SDA and SCL (fast) | tr | 300 | ns | Fast mode I2C | 5 | ||
| Spike pulse width suppressed by filter | tSP | 50 | ns | Standard and fast mode I2C | 5 | ||
| Data output valid time | tv(Q) | 200 | ns | measured from 0.7VCC on SCL to 50% I/O output | 5 | ||
| Data input set-up time | tsu(D) | 150 | ns | 5 | |||
| Data input hold time | th(D) | 1 | μs | 5 | |||
| Valid time on pin INT | tv(INT) | 4 | μs | 5 | |||
| Reset time on pin INT | trst(INT) | 4 | μs | 5 | |||
| Reset pulse width | tw(rst) | 25 | ns | 6 | |||
| Reset recovery time | tvrec(rst) | 0 | ns | 6 | |||
| Reset time | trst | 1 | us | 6 | |||
| Power supply voltage | -0.5 | 6 | V | 3 | |||
| Voltage on an I/O pin | -0.5 | 6 | V | GND-0.5V to +6.0V | 3 | ||
| Input current | -20 | 20 | mA | 3 | |||
| Output current on an I/O pin | -50 | 50 | mA | 3 | |||
| Supply current | 160 | mA | 3 | ||||
| Ground supply current | 200 | mA | 3 | ||||
| Total power dissipation | 200 | mW | 3 | ||||
| Operation temperature | -40 | 85 | ℃ | 3 |
CAD (KiCad official)
- Symbol:
PI4IOE5V9539LEX - Footprint:
Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm - 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files:
pi4ioe5v9539lex-etched.step/pi4ioe5v9539lex-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pi4ioe5v9539lex.step/pi4ioe5v9539lex.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (17 pp, sha256
14b4073298db8e2b, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PI4IOE5V9539LEX
**Diodes Incorporated** · I/O Expanders · TSSOP-24
PI4IOE5V9539LEX from Diodes Incorporated, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INT | output | Active-low open-drain interrupt output, activated when a port pin configured as an input changes state. |
| 2 | A1 | input | Address input 1, which together with A0 sets the fixed I2C-bus address (up to four devices on one bus). |
| 3 | RESET | input | Active-low reset input; driving it LOW resets the state machine and registers to defaults, with a minimum pulse width of 25 ns. |
| 4 | IO0_0 | bidirectional | Port 0 input/output 0, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 5 | IO0_1 | bidirectional | Port 0 input/output 1, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 6 | IO0_2 | bidirectional | Port 0 input/output 2, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 7 | IO0_3 | bidirectional | Port 0 input/output 3, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 8 | IO0_4 | bidirectional | Port 0 input/output 4, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 9 | IO0_5 | bidirectional | Port 0 input/output 5, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 10 | IO0_6 | bidirectional | Port 0 input/output 6, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 11 | IO0_7 | bidirectional | Port 0 input/output 7, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 12 | GND | power_in | Ground, 0 V reference. |
| 13 | IO1_0 | bidirectional | Port 1 input/output 0, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 14 | IO1_1 | bidirectional | Port 1 input/output 1, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 15 | IO1_2 | bidirectional | Port 1 input/output 2, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 16 | IO1_3 | bidirectional | Port 1 input/output 3, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 17 | IO1_4 | bidirectional | Port 1 input/output 4, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 18 | IO1_5 | bidirectional | Port 1 input/output 5, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 19 | IO1_6 | bidirectional | Port 1 input/output 6, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 20 | IO1_7 | bidirectional | Port 1 input/output 7, 5V tolerant (up to 5.5 V), configured as input at reset. |
| 21 | A0 | input | Address input 0, which together with A1 sets the fixed I2C-bus address. |
| 22 | SCL | input | Serial clock line input, 0 to 400 kHz, with noise filter. |
| 23 | SDA | bidirectional | Serial data line, open-drain, with noise filter on the input. |
| 24 | VCC | power_in | Supply voltage, 2.3 V to 5.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | TSSOP-24 |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 24 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2.3 | | 5.5 | V | | 3 |
| Supply current | ICC | | 135 | 200 | μA | Operating mode; VCC = 5.5 V; no load; fSCL= 100 kHz | 3 |
| Standby current (VI=GND) | Istb | | 0.25 | 1 | uA | Standby mode; VCC = 5.5 V; no load; VI = GND; fSCL= 0 kHz; I/O = inputs | 3 |
| Standby current (VI=VCC) | Istb | | 0.25 | 1 | μA | Standby mode; VCC = 5.5 V; no load; VI = VCC; fSCL= 0 kHz; I/O = inputs | 3 |
| Power-on reset voltage | VPOR | | 1.16 | 1.41 | V | | 3 |
| SCL/SDA low level input voltage | VIL | -0.5 | | 0.3 | V | max is +0.3VCC | 3 |
| SCL/SDA high level input voltage | VIH | 0.7 | | 5.5 | V | min is 0.7VCC | 3 |
| SDA low level output current | IOL | 3 | | | mA | VOL=0.4V | 3 |
| SCL/SDA leakage current | IL | -1 | | 1 | μA | VI=VCC=GND | 3 |
| SCL/SDA input capacitance | Ci | | 6 | 10 | pF | VI =GND | 3 |
| I/O low level input voltage | VIL | -0.5 | | 0.81 | V | | 4 |
| I/O high level input voltage | VIH | 1.8 | | 5.5 | V | | 4 |
| I/O low level output current | IOL | 8 | 9 | | mA | VCC = 2.3 V to 5.5 V; VOL = 0.5 V | 4 |
| I/O low level output current | IOL | 10 | 11 | | mA | VCC= 2.3 V to 5.5 V; VOL = 0.7 V | 4 |
| High level output voltage | VOH | 1.8 | | | V | IOH=-8mA;VCC=2.3V | 4 |
| High level output voltage | VOH | 1.7 | | | V | IOH=-10mA;VCC=2.3V | 4 |
| High level output voltage | VOH | 2.6 | | | V | IOH=-8mA;VCC=3.0V | 4 |
| High level output voltage | VOH | 2.5 | | | V | IOH=-10mA;VCC=3.0V | 4 |
| High level output voltage | VOH | 4.1 | | | V | IOH=-8mA;VCC=4.75V | 4 |
| High level output voltage | VOH | 4 | | | V | IOH=-10mA;VCC=4.75V | 4 |
| High level input leakage current | ILIH | | | 1 | μA | VCC=5.5V; VI=VCC | 4 |
| Low level input leakage current | ILIL | | | -1 | μA | VCC=5.5V; VI=GND | 4 |
| I/O input capacitance | Ci | | 3.7 | 10 | pF | | 4 |
| I/O output capacitance | Co | | 3.7 | 10 | pF | | 4 |
| INT low level output current | IOL | 3 | | | mA | VOL=0.4V | 4 |
| A0,A1,RESET low level input voltage | VIL | -0.5 | | 0.81 | V | | 4 |
| A0,A1,RESET high level input voltage | VIH | 1.8 | | 5.5 | V | | 4 |
| A0,A1,RESET input leakage current | IL | -1 | | 1 | μA | | 4 |
| SCL clock frequency (standard mode) | fSCL | 0 | | 100 | kHz | Standard mode I2C | 5 |
| SCL clock frequency (fast mode) | fSCL | 0 | | 400 | kHz | Fast mode I2C | 5 |
| Bus free time STOP to START (standard) | tBUF | 4.7 | | | μs | Standard mode I2C | 5 |
| Bus free time STOP to START (fast) | tBUF | 1.3 | | | μs | Fast mode I2C | 5 |
| Hold time repeated START (standard) | tHD;STA | 4 | | | μs | Standard mode I2C | 5 |
| Hold time repeated START (fast) | tHD;STA | 0.6 | | | μs | Fast mode I2C | 5 |
| Set-up time repeated START (standard) | tSU;STA | 4.7 | | | μs | Standard mode I2C | 5 |
| Set-up time repeated START (fast) | tSU;STA | 0.6 | | | μs | Fast mode I2C | 5 |
| Set-up time STOP (standard) | tSU;STO | 4 | | | μs | Standard mode I2C | 5 |
| Set-up time STOP (fast) | tSU;STO | 0.6 | | | μs | Fast mode I2C | 5 |
| Data valid acknowledge time (standard) | tVD;ACK | | | 3.45 | μs | Standard mode I2C | 5 |
| Data valid acknowledge time (fast) | tVD;ACK | | | 0.9 | μs | Fast mode I2C | 5 |
| Data hold time (standard) | tHD;DAT | 0 | | | ns | Standard mode I2C | 5 |
| Data hold time (fast) | tHD;DAT | 0 | | | ns | Fast mode I2C | 5 |
| Data valid time (standard) | tVD;DAT | | | 3.45 | ns | Standard mode I2C | 5 |
| Data valid time (fast) | tVD;DAT | | | 0.9 | ns | Fast mode I2C | 5 |
| Data set-up time (standard) | tSU;DAT | 250 | | | ns | Standard mode I2C | 5 |
| Data set-up time (fast) | tSU;DAT | 100 | | | ns | Fast mode I2C | 5 |
| LOW period of SCL (standard) | tLOW | 4.7 | | | μs | Standard mode I2C | 5 |
| LOW period of SCL (fast) | tLOW | 1.3 | | | μs | Fast mode I2C | 5 |
| HIGH period of SCL (standard) | tHIGH | 4 | | | μs | Standard mode I2C | 5 |
| HIGH period of SCL (fast) | tHIGH | 0.6 | | | μs | Fast mode I2C | 5 |
| Fall time SDA and SCL | tf | | | 300 | ns | Standard and fast mode I2C | 5 |
| Rise time SDA and SCL (standard) | tr | | | 1000 | ns | Standard mode I2C | 5 |
| Rise time SDA and SCL (fast) | tr | | | 300 | ns | Fast mode I2C | 5 |
| Spike pulse width suppressed by filter | tSP | | | 50 | ns | Standard and fast mode I2C | 5 |
| Data output valid time | tv(Q) | | | 200 | ns | measured from 0.7VCC on SCL to 50% I/O output | 5 |
| Data input set-up time | tsu(D) | 150 | | | ns | | 5 |
| Data input hold time | th(D) | 1 | | | μs | | 5 |
| Valid time on pin INT | tv(INT) | | | 4 | μs | | 5 |
| Reset time on pin INT | trst(INT) | | | 4 | μs | | 5 |
| Reset pulse width | tw(rst) | 25 | | | ns | | 6 |
| Reset recovery time | tvrec(rst) | 0 | | | ns | | 6 |
| Reset time | trst | 1 | | | us | | 6 |
| Power supply voltage | | -0.5 | | 6 | V | | 3 |
| Voltage on an I/O pin | | -0.5 | | 6 | V | GND-0.5V to +6.0V | 3 |
| Input current | | -20 | | 20 | mA | | 3 |
| Output current on an I/O pin | | -50 | | 50 | mA | | 3 |
| Supply current | | | | 160 | mA | | 3 |
| Ground supply current | | | | 200 | mA | | 3 |
| Total power dissipation | | | | 200 | mW | | 3 |
| Operation temperature | | -40 | | 85 | ℃ | | 3 |
## CAD (KiCad official)
- Symbol: `PI4IOE5V9539LEX`
- Footprint: `Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm`
- 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files: `pi4ioe5v9539lex-etched.step` / `pi4ioe5v9539lex-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pi4ioe5v9539lex.step` / `pi4ioe5v9539lex.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/PI4IOE5V9539LEX.pdf) (17 pp, sha256 `14b4073298db8e2b`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pi4ioe5v9539lex-datasheet.pdf)