component
PI4IOE5V6416LEX
Public Made by Adomby adom
Diodes Incorporated I/O Expanders, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PI4IOE5V6416LEX
Diodes Incorporated · I/O Expanders · TSSOP-24
PI4IOE5V6416LEX from Diodes Incorporated, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INT | output | Active-low interrupt output; connect to VDD(I2C-bus) or VDD(P) through a pull-up resistor. |
| 2 | VDD(I2C-bus) | power_in | Supply voltage of the I2C-bus (1.65V to 5.5V); connect directly to the VDD of the external I2C master and provides voltage-level translation. |
| 3 | RESET | input | Active-LOW reset input; connect to VDD(I2C-bus) through a pull-up resistor if no active connection is used. |
| 4 | P0_0 | bidirectional | Port 0 input/output 0. |
| 5 | P0_1 | bidirectional | Port 0 input/output 1. |
| 6 | P0_2 | bidirectional | Port 0 input/output 2. |
| 7 | P0_3 | bidirectional | Port 0 input/output 3. |
| 8 | P0_4 | bidirectional | Port 0 input/output 4. |
| 9 | P0_5 | bidirectional | Port 0 input/output 5. |
| 10 | P0_6 | bidirectional | Port 0 input/output 6. |
| 11 | P0_7 | bidirectional | Port 0 input/output 7. |
| 12 | VSS | power_in | Ground. |
| 13 | P1_0 | bidirectional | Port 1 input/output 0. |
| 14 | P1_1 | bidirectional | Port 1 input/output 1. |
| 15 | P1_2 | bidirectional | Port 1 input/output 2. |
| 16 | P1_3 | bidirectional | Port 1 input/output 3. |
| 17 | P1_4 | bidirectional | Port 1 input/output 4. |
| 18 | P1_5 | bidirectional | Port 1 input/output 5. |
| 19 | P1_6 | bidirectional | Port 1 input/output 6. |
| 20 | P1_7 | bidirectional | Port 1 input/output 7. |
| 21 | ADDR | input | Address input; connect directly to VDD(P) or ground. |
| 22 | SCL | input | Serial clock bus; connect to VDD(I2C-bus) through a pull-up resistor. |
| 23 | SDA | bidirectional | Serial data bus; connect to VDD(I2C-bus) through a pull-up resistor. |
| 24 | VDD(P) | power_in | Supply voltage of the PI4IOE5V6416 for Port P (1.65V to 5.5V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | TSSOP-24 |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 24 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| I2C-bus supply voltage | VDD(I2C-bus) | 1.65 | 5.5 | V | 5 | ||
| GPIO port supply voltage | VDD(P) | 1.65 | 5.5 | V | 5 | ||
| High-Level Output Current | IOH | 10 | mA | 5 | |||
| Low-Level Output Current | IOL | 25 | mA | 5 | |||
| Power Supply | -0.5 | 6 | V | 5 | |||
| Voltage on an I/O Pin | -0.5 | 6 | V | Input / Output | 5 | ||
| Input Current | -20 | 20 | mA | 5 | |||
| Output Current on an I/O Pin | -50 | 50 | mA | 5 | |||
| Operation Temperature | -40 | 85 | °C | 5 | |||
| Storage Temperature | -65 | 150 | °C | 5 | |||
| Maximum Junction Temperature | Tj(max) | 125 | °C | 5 | |||
| ESD (HBM) | 2 | kV | 5 | ||||
| Supply current standby | IDD | 1.5 | 7 | μA | Standby mode, I/O = inputs, fSCL = 0kHz, VDD(P) = 3.6-5.5V | 5 | |
| Supply current standby | IDD | 1 | 3.2 | μA | Standby mode, I/O = inputs, fSCL = 0kHz, VDD(P) = 2.3-3.6V | 5 | |
| Supply current standby | IDD | 0.5 | 1.7 | μA | Standby mode, I/O = inputs, fSCL = 0kHz, VDD(P) = 1.65-2.3V | 5 | |
| Supply current standby | IDD | 10 | 25 | μA | Standby mode, I/O = inputs, fSCL = 400kHz, VDD(P) = 3.6-5.5V | 5 | |
| Supply current standby | IDD | 6.5 | 15 | μA | Standby mode, I/O = inputs, fSCL = 400kHz, VDD(P) = 2.3-3.6V | 5 | |
| Supply current standby | IDD | 4 | 9 | μA | Standby mode, I/O = inputs, fSCL = 400kHz, VDD(P) = 1.65-2.3V | 5 | |
| Supply current active | IDD | 60 | 125 | μA | Active mode, I/O = inputs, fSCL = 400kHz, continuous register read, VDD(P) = 3.6-5.5V | 5 | |
| Supply current active | IDD | 40 | 75 | μA | Active mode, I/O = inputs, fSCL = 400kHz, continuous register read, VDD(P) = 2.3-3.6V | 5 | |
| Supply current active | IDD | 20 | 45 | μA | Active mode, I/O = inputs, fSCL = 400kHz, continuous register read, VDD(P) = 1.65-2.3V | 5 | |
| Power-on reset voltage rising | VPOR | 1.1 | 1.4 | V | Rising | 5 | |
| Power-on reset voltage falling | VPOR | 0.5 | V | Falling | 5 | ||
| Reset time | Td(rst) | 1 | μs | Time of VDD(P) drop to VPOR(min) − 50mV for successful Power-on reset | 5 | ||
| SCL/SDA low level input voltage | VIL | -0.5 | 0.3 | V | max is 0.3 VDD(I2C-bus) | 5 | |
| SCL/SDA high level input voltage | VIH | 0.7 | 5.5 | V | min is 0.7 VDD(I2C-bus) | 5 | |
| SDA low level output current | IOL | 3 | mA | VOL =0.4V | 5 | ||
| Leakage current | IL | -1 | 1 | μA | VIN = VDD(I2C_bus) or VSS | 6 | |
| Input capacitance | Ci | 7 | 8 | pF | VIN = VSS | 6 | |
| INT low level output current | IOL | 3 | mA | VOL= 0.4V | 6 | ||
| INT output capacitance | Co | 7 | 8 | pF | 6 | ||
| RESET low level input voltage | VIL | -0.5 | 0.3 | V | max is 0.3 VDD(I2C-bus) | 6 | |
| ADDR low level input voltage | VIL | -0.5 | 0.3 | V | max is 0.3 VDD(P) | 6 | |
| RESET high level input voltage | VIH | 0.7 | 5.5 | V | min is 0.7 VDD(I2C-bus) | 6 | |
| ADDR high level input voltage | VIH | 0.7 | 5.5 | V | min is 0.7 VDD(P) | 6 | |
| ADDR/RESET input leakage current | IL | -1 | 1 | μA | 6 | ||
| ADDR/RESET input capacitance | Ci | 6 | 7 | pF | 6 | ||
| I/O low-level input voltage | VIL | -0.5 | 0.3 | V | P0, P7; max is 0.3*VDD(P) | 6 | |
| I/O high-level input voltage | VIH | 0.7 | 5.5 | V | P0, P7; min is 0.7*VDD(P) | 6 | |
| High-level output voltage | VOH | 1.1 | V | IOH = -2.5mA; CCX.X=00b, VDD(P) = 1.65V | 6 | ||
| High-level output voltage | VOH | 1.7 | V | IOH = -5mA; CCX.X=01b, VDD(P) = 2.3V | 6 | ||
| High-level output voltage | VOH | 2.5 | V | IOH = -7.5mA; CCX.X=10b, VDD(P) = 3V | 6 | ||
| High-level output voltage | VOH | 4 | V | IOH = -10mA; CCX.X=11b, VDD(P) = 4.5V | 6 | ||
| Low-level output voltage | VOL | 0.5 | V | IOL = 2.5mA; CCX.X=00b, VDD(P) = 1.65V | 6 | ||
| Low-level output voltage | VOL | 0.3 | V | IOL = 5mA; CCX.X=01b, VDD(P) = 2.3V | 6 | ||
| Low-level output voltage | VOL | 0.25 | V | IOL = 7.5mA; CCX.X=10b, VDD(P) = 3V | 6 | ||
| Low-level output voltage | VOL | 0.2 | V | IOL = 10mA; CCX.X=11b, VDD(P) = 4.5V | 6 | ||
| High-level input current | IIH | 1 | μA | P port; VI = VDD(P) | 6 | ||
| Low-level input current | IIL | 1 | μA | P port; VI = VSS | 6 | ||
| Internal pull-up resistance | Rpu(int) | 50 | 100 | 150 | kΩ | Input/Output | 6 |
| Internal pull-down resistance | Rpd(int) | 50 | 100 | 150 | kΩ | Input/Output | 6 |
| SCL clock frequency (Fast Mode) | fSCL | 0 | 400 | kHz | Fast Mode I2C | 7 | |
| Bus free time STOP to START (Fast Mode) | tBUF | 1.3 | μs | Fast Mode I2C | 7 | ||
| Reset pulse width | tw(rst) | 30 | ns | 7 | |||
| Reset recovery time | trst_rec | 200 | ns | 7 | |||
| Data output valid time (SCL to P Port) | tV(Q) | 400 | ns | 7 |
CAD (KiCad official)
- Symbol:
PI4IOE5V6416LEX - Footprint:
Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm - 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files:
pi4ioe5v6416lex-etched.step/pi4ioe5v6416lex-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pi4ioe5v6416lex.step/pi4ioe5v6416lex.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (19 pp, sha256
d920aec72f7e2898, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PI4IOE5V6416LEX
**Diodes Incorporated** · I/O Expanders · TSSOP-24
PI4IOE5V6416LEX from Diodes Incorporated, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INT | output | Active-low interrupt output; connect to VDD(I2C-bus) or VDD(P) through a pull-up resistor. |
| 2 | VDD(I2C-bus) | power_in | Supply voltage of the I2C-bus (1.65V to 5.5V); connect directly to the VDD of the external I2C master and provides voltage-level translation. |
| 3 | RESET | input | Active-LOW reset input; connect to VDD(I2C-bus) through a pull-up resistor if no active connection is used. |
| 4 | P0_0 | bidirectional | Port 0 input/output 0. |
| 5 | P0_1 | bidirectional | Port 0 input/output 1. |
| 6 | P0_2 | bidirectional | Port 0 input/output 2. |
| 7 | P0_3 | bidirectional | Port 0 input/output 3. |
| 8 | P0_4 | bidirectional | Port 0 input/output 4. |
| 9 | P0_5 | bidirectional | Port 0 input/output 5. |
| 10 | P0_6 | bidirectional | Port 0 input/output 6. |
| 11 | P0_7 | bidirectional | Port 0 input/output 7. |
| 12 | VSS | power_in | Ground. |
| 13 | P1_0 | bidirectional | Port 1 input/output 0. |
| 14 | P1_1 | bidirectional | Port 1 input/output 1. |
| 15 | P1_2 | bidirectional | Port 1 input/output 2. |
| 16 | P1_3 | bidirectional | Port 1 input/output 3. |
| 17 | P1_4 | bidirectional | Port 1 input/output 4. |
| 18 | P1_5 | bidirectional | Port 1 input/output 5. |
| 19 | P1_6 | bidirectional | Port 1 input/output 6. |
| 20 | P1_7 | bidirectional | Port 1 input/output 7. |
| 21 | ADDR | input | Address input; connect directly to VDD(P) or ground. |
| 22 | SCL | input | Serial clock bus; connect to VDD(I2C-bus) through a pull-up resistor. |
| 23 | SDA | bidirectional | Serial data bus; connect to VDD(I2C-bus) through a pull-up resistor. |
| 24 | VDD(P) | power_in | Supply voltage of the PI4IOE5V6416 for Port P (1.65V to 5.5V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | TSSOP-24 |
| Category | Communication Interface Chip/UART/485/232 |
| Pins | 24 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| I2C-bus supply voltage | VDD(I2C-bus) | 1.65 | | 5.5 | V | | 5 |
| GPIO port supply voltage | VDD(P) | 1.65 | | 5.5 | V | | 5 |
| High-Level Output Current | IOH | | | 10 | mA | | 5 |
| Low-Level Output Current | IOL | | | 25 | mA | | 5 |
| Power Supply | | -0.5 | | 6 | V | | 5 |
| Voltage on an I/O Pin | | -0.5 | | 6 | V | Input / Output | 5 |
| Input Current | | -20 | | 20 | mA | | 5 |
| Output Current on an I/O Pin | | -50 | | 50 | mA | | 5 |
| Operation Temperature | | -40 | | 85 | °C | | 5 |
| Storage Temperature | | -65 | | 150 | °C | | 5 |
| Maximum Junction Temperature | Tj(max) | | | 125 | °C | | 5 |
| ESD (HBM) | | | | 2 | kV | | 5 |
| Supply current standby | IDD | | 1.5 | 7 | μA | Standby mode, I/O = inputs, fSCL = 0kHz, VDD(P) = 3.6-5.5V | 5 |
| Supply current standby | IDD | | 1 | 3.2 | μA | Standby mode, I/O = inputs, fSCL = 0kHz, VDD(P) = 2.3-3.6V | 5 |
| Supply current standby | IDD | | 0.5 | 1.7 | μA | Standby mode, I/O = inputs, fSCL = 0kHz, VDD(P) = 1.65-2.3V | 5 |
| Supply current standby | IDD | | 10 | 25 | μA | Standby mode, I/O = inputs, fSCL = 400kHz, VDD(P) = 3.6-5.5V | 5 |
| Supply current standby | IDD | | 6.5 | 15 | μA | Standby mode, I/O = inputs, fSCL = 400kHz, VDD(P) = 2.3-3.6V | 5 |
| Supply current standby | IDD | | 4 | 9 | μA | Standby mode, I/O = inputs, fSCL = 400kHz, VDD(P) = 1.65-2.3V | 5 |
| Supply current active | IDD | | 60 | 125 | μA | Active mode, I/O = inputs, fSCL = 400kHz, continuous register read, VDD(P) = 3.6-5.5V | 5 |
| Supply current active | IDD | | 40 | 75 | μA | Active mode, I/O = inputs, fSCL = 400kHz, continuous register read, VDD(P) = 2.3-3.6V | 5 |
| Supply current active | IDD | | 20 | 45 | μA | Active mode, I/O = inputs, fSCL = 400kHz, continuous register read, VDD(P) = 1.65-2.3V | 5 |
| Power-on reset voltage rising | VPOR | | 1.1 | 1.4 | V | Rising | 5 |
| Power-on reset voltage falling | VPOR | | 0.5 | | V | Falling | 5 |
| Reset time | Td(rst) | 1 | | | μs | Time of VDD(P) drop to VPOR(min) − 50mV for successful Power-on reset | 5 |
| SCL/SDA low level input voltage | VIL | -0.5 | | 0.3 | V | max is 0.3 VDD(I2C-bus) | 5 |
| SCL/SDA high level input voltage | VIH | 0.7 | | 5.5 | V | min is 0.7 VDD(I2C-bus) | 5 |
| SDA low level output current | IOL | 3 | | | mA | VOL =0.4V | 5 |
| Leakage current | IL | -1 | | 1 | μA | VIN = VDD(I2C_bus) or VSS | 6 |
| Input capacitance | Ci | | 7 | 8 | pF | VIN = VSS | 6 |
| INT low level output current | IOL | 3 | | | mA | VOL= 0.4V | 6 |
| INT output capacitance | Co | | 7 | 8 | pF | | 6 |
| RESET low level input voltage | VIL | -0.5 | | 0.3 | V | max is 0.3 VDD(I2C-bus) | 6 |
| ADDR low level input voltage | VIL | -0.5 | | 0.3 | V | max is 0.3 VDD(P) | 6 |
| RESET high level input voltage | VIH | 0.7 | | 5.5 | V | min is 0.7 VDD(I2C-bus) | 6 |
| ADDR high level input voltage | VIH | 0.7 | | 5.5 | V | min is 0.7 VDD(P) | 6 |
| ADDR/RESET input leakage current | IL | -1 | | 1 | μA | | 6 |
| ADDR/RESET input capacitance | Ci | | 6 | 7 | pF | | 6 |
| I/O low-level input voltage | VIL | -0.5 | | 0.3 | V | P0, P7; max is 0.3*VDD(P) | 6 |
| I/O high-level input voltage | VIH | 0.7 | | 5.5 | V | P0, P7; min is 0.7*VDD(P) | 6 |
| High-level output voltage | VOH | 1.1 | | | V | IOH = -2.5mA; CCX.X=00b, VDD(P) = 1.65V | 6 |
| High-level output voltage | VOH | 1.7 | | | V | IOH = -5mA; CCX.X=01b, VDD(P) = 2.3V | 6 |
| High-level output voltage | VOH | 2.5 | | | V | IOH = -7.5mA; CCX.X=10b, VDD(P) = 3V | 6 |
| High-level output voltage | VOH | 4 | | | V | IOH = -10mA; CCX.X=11b, VDD(P) = 4.5V | 6 |
| Low-level output voltage | VOL | | | 0.5 | V | IOL = 2.5mA; CCX.X=00b, VDD(P) = 1.65V | 6 |
| Low-level output voltage | VOL | | | 0.3 | V | IOL = 5mA; CCX.X=01b, VDD(P) = 2.3V | 6 |
| Low-level output voltage | VOL | | | 0.25 | V | IOL = 7.5mA; CCX.X=10b, VDD(P) = 3V | 6 |
| Low-level output voltage | VOL | | | 0.2 | V | IOL = 10mA; CCX.X=11b, VDD(P) = 4.5V | 6 |
| High-level input current | IIH | | | 1 | μA | P port; VI = VDD(P) | 6 |
| Low-level input current | IIL | | | 1 | μA | P port; VI = VSS | 6 |
| Internal pull-up resistance | Rpu(int) | 50 | 100 | 150 | kΩ | Input/Output | 6 |
| Internal pull-down resistance | Rpd(int) | 50 | 100 | 150 | kΩ | Input/Output | 6 |
| SCL clock frequency (Fast Mode) | fSCL | 0 | | 400 | kHz | Fast Mode I2C | 7 |
| Bus free time STOP to START (Fast Mode) | tBUF | 1.3 | | | μs | Fast Mode I2C | 7 |
| Reset pulse width | tw(rst) | 30 | | | ns | | 7 |
| Reset recovery time | trst_rec | 200 | | | ns | | 7 |
| Data output valid time (SCL to P Port) | tV(Q) | | | 400 | ns | | 7 |
## CAD (KiCad official)
- Symbol: `PI4IOE5V6416LEX`
- Footprint: `Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm`
- 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files: `pi4ioe5v6416lex-etched.step` / `pi4ioe5v6416lex-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pi4ioe5v6416lex.step` / `pi4ioe5v6416lex.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/PI4IOE5V6416LEX.pdf) (19 pp, sha256 `d920aec72f7e2898`, retrieved 2026-10-31, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pi4ioe5v6416lex-datasheet.pdf)