Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

PGA309AIPWR

Texas Instruments · ADCs/DACs - Special Purpose · TSSOP-16

PGA309AIPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VEXC power_out Bridge sensor excitation output with range 0 to VSA−0.5V at IEXC=5mA and short-circuit current of 50mA.
2 GNDA power_in Analog ground, must be same as GNDD.
3 VSA power_in Analog voltage supply ranging from 2.7V to 5.5V, within 200mV of VSD.
4 VIN1 input Signal input voltage 1 with linear range 0.2V to VSA−1.5V and input bias current 0.1 to 1.5nA.
5 VIN2 input Signal input voltage 2 with linear range 0.2V to VSA−1.5V and input bias current 0.1 to 1.5nA.
6 VFB output VOUT feedback pin for over/under-scale limit circuitry with output voltage range 0.1V to VSA−0.1V.
7 VOUT output Analog output voltage of conditioned sensor with range 0.05V to VSA−0.1V at load resistance RL=10kΩ.
8 VSJ output Output amplifier summing junction for compensation and external gain setting resistors when driving capacitive loads greater than 100pF.
9 TEST input Test/external controller mode pin; pull to GNDD for normal operation.
10 VSD power_in Digital voltage supply ranging from 2.7V to 5.5V, within 200mV of VSA.
11 GNDD power_in Digital ground, must be same as GNDA.
12 PRG tri_state Single-wire UART-compatible programming interface with bit rates 4.8kbps to 38.4kbps, open-drain output.
13 SCL tri_state Two-wire clock interface for calibration at 1kHz to 400kHz, open-drain output.
14 SDA tri_state Two-wire data interface for calibration at 1kHz to 400kHz, open-drain output.
15 TEMPIN input External temperature signal input with programmable gain of 1, 2, 4, or 8 and voltage range −0.2V to VSA+0.2V.
16 REFIN/REFOUT bidirectional Reference input/output pin with selectable internal reference 2.5V or 4.096V (drift ±10 or ±7ppm/°C) or external reference input.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Data Acquisition
Pins 16

CAD (KiCad official)

  • Symbol: PGA309AIPWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: pga309aipwr-etched.step / pga309aipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pga309aipwr.step / pga309aipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (26 pp, sha256 33b5c812f99c8c5c, retrieved 2026-09-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF