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PGA205AU

Texas Instruments · Programmable / Variable Gain Amplifiers (PGA/VGA) · SOIC-16-300mil

PGA205AU from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VO1 output Pin labeled VO1 in the pin configuration and block diagram; the datasheet gives no electrical limits or functional description for this pin.
2 NC unconnected No internal connection.
3 NC unconnected No internal connection.
4 V-IN power_in Inverting analog input; each input is individually protected for up to ±40V, and an input bias current return path must be provided.
5 V+IN power_in Non-inverting analog input; each input is individually protected for up to ±40V, and an input bias current return path must be provided.
6 VOS Adjust passive Input-stage offset trim terminal, used with the optional trim circuit of Figure 3 to adjust only the input-stage offset (about ±250µV trim range), not system or sensor offset.
7 VOS Adjust passive Input-stage offset trim terminal, used with the optional trim circuit of Figure 3 to adjust only the input-stage offset (about ±250µV trim range), not system or sensor offset.
8 V- power_in Negative power supply; the device operates from ±4.5V to ±18V, with a absolute maximum supply of ±18V.
9 VO2 output Pin labeled VO2 in the pin configuration and block diagram; the datasheet gives no electrical limits or functional description for this pin.
10 Ref input Output reference terminal, normally grounded, that must be a low-impedance connection because a 5Ω series resistance degrades CMR to about 80dB at G=1.
11 VO output Amplifier output, which must be connected to Feedback (pin 12) for proper operation; the output is short-circuit protected to ground (continuous rating).
12 Feedback input Output feedback connection that must be tied to output pin 11 for proper operation, and can be used to sense the output voltage directly at the load.
13 V+ power_in Positive power supply; the device operates from ±4.5V to ±18V, with an absolute maximum supply of ±18V.
14 Dig. Ground power_in Digital ground reference for the A0/A1 logic inputs, which may be connected to any potential from V- up to 4V below V+ and is normally connected to ground.
15 A0 input Gain-select logic input (TTL/CMOS compatible) where a logic 1 is defined as more than 2V above digital ground (pin 14), and inputs are not latched.
16 A1 input Gain-select logic input (TTL/CMOS compatible) where a logic 1 is defined as more than 2V above digital ground (pin 14), and inputs are not latched.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16-300mil
Category Amplifiers/Comparators
Pins 16

CAD (KiCad official)

  • Symbol: PGA205AU
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: pga205au-etched.step / pga205au-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pga205au.step / pga205au.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (20 pp, sha256 a49dcc8c5d3928e5, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF