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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	Publish 0.1.0 · Ray	6d ago
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pga205ap-etched.step	pga205ap: factory component page (tier=lcsc) · Ray	6d ago
pga205ap-hero.glb	pga205ap: hero GLB from the etched model (keeps the MPN mark) · Ray	6d ago
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README.md	Publish 0.1.0 · Ray	6d ago

PGA205AP

Texas Instruments · Instrumentation OpAmps · PDIP-16

PGA205AP from Texas Instruments, in a PDIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VO1	passive	Pin 1 is labeled VO1 in the pin configuration and is an internal amplifier node whose function and electrical limits the datasheet does not state.
2	NC	unconnected	No internal connection.
3	NC	unconnected	No internal connection.
4	V-IN	power_in	Inverting analog input, individually protected for up to ±40V, which needs a bias-current return path to operate properly.
5	V+IN	power_in	Non-inverting analog input, individually protected for up to ±40V, which needs a bias-current return path to operate properly.
6	VOS Adjust	passive	Input-stage offset trim terminal, used with a 200kΩ to 1MΩ network to V- for a trim range of about ±250µV.
7	VOS Adjust	passive	Input-stage offset trim terminal, used with a 200kΩ to 1MΩ network to V- for a trim range of about ±250µV.
8	V-	power_in	Negative power supply, operating from ±4.5V to ±18V with a absolute maximum supply of ±18V.
9	VO2	passive	Pin 9 is labeled VO2 in the pin configuration and is an internal amplifier node whose electrical limits the datasheet does not state.
10	Ref	input	Output reference terminal, normally grounded, which must be low impedance because 5Ω in series degrades CMR to about 80dB at G=1.
11	VO	output	Amplifier output with short-circuit current of +23/-17mA and load capacitance stability to 1000pF, which must be tied to the Feedback pin 12.
12	Feedback	input	Output feedback connection that must be connected to output pin 11 for proper operation.
13	V+	power_in	Positive power supply, operating from ±4.5V to ±18V with a absolute maximum supply of ±18V.
14	Dig. Ground	power_in	Digital ground, which may be connected to any potential from V- up to 4V below V+, and logic 1 is defined as more than 2V above it.
15	A0	input	Gain-select logic input, TTL/CMOS-compatible, with logic 1 defined as more than 2V above digital ground and about 1µA drawn when low.
16	A1	input	Gain-select logic input, TTL/CMOS-compatible, with logic 1 defined as more than 2V above digital ground and about 1µA drawn when low.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	PDIP-16
Category	Amplifiers
Pins	16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Common-Mode Rejection G=1	CMRR	75	88		dB	VCM=±10V, ∆RS=1kΩ	3
Common-Mode Rejection G=2	CMRR	80	94		dB	VCM=±10V, ∆RS=1kΩ	3
Common-Mode Rejection G=4	CMRR	85	100		dB	VCM=±10V, ∆RS=1kΩ	3
Common-Mode Rejection G=8	CMRR	89	106		dB	VCM=±10V, ∆RS=1kΩ	3
Gain Error G=1		-0.05		0.05	%	G=1	3
Gain Error G=2		-0.05		0.05	%	G=2	3
Gain Error G=4		-0.05		0.05	%	G=4	3
Gain Error G=8		-0.05		0.05	%	G=8	3
Gain vs Temperature		-10	2.5	10	ppm/°C	G=1 to 8	3
Nonlinearity G=1		-0.002		0.002	% of FSR	G=1	3
Nonlinearity G=2		-0.004		0.004	% of FSR	G=2	3
Nonlinearity G=4		-0.004		0.004	% of FSR	G=4	3
Nonlinearity G=8		-0.004		0.004	% of FSR	G=8	3
Input Common-Mode Range		10.5	12.7		V	VO=0V (see text)	3
Safe Input Voltage				40	V		3
Output Short Circuit Current		-17		23	mA		3
Load Capacitance Stability				1000	pF		3
Bandwidth -3dB G=1			1		MHz	G=1	3
Bandwidth -3dB G=2			400		kHz	G=2	3
Bandwidth -3dB G=4			200		kHz	G=4	3
Bandwidth -3dB G=8			100		kHz	G=8	3
Slew Rate		0.3	0.7		V/µs	VO=±10V, G=8	3
Settling Time 0.1% G=1			22		µs	0.1%, G=1	3
Settling Time 0.1% G=2			22		µs	0.1%, G=2	3
Settling Time 0.1% G=4			23		µs	0.1%, G=4	3
Settling Time 0.1% G=8			23		µs	0.1%, G=8	3
Settling Time 0.01% G=1			23		µs	0.01%, G=1	3
Settling Time 0.01% G=2			23		µs	0.01%, G=2	3
Settling Time 0.01% G=4			25		µs	0.01%, G=4	3
Settling Time 0.01% G=8			28		µs	0.01%, G=8	3
Overload Recovery			70		µs	50% overdrive	3
Power Supply Voltage	VS	4.5	15	18	V		3
Quiescent Current	IQ		6.5	7.5	mA	VIN=0V	3
Specification Temperature Range		-40		85	°C		3
Operating Temperature Range		-40		125	°C		3
Thermal Resistance Junction-to-Ambient	θJA		80		°C/W		3
Supply Voltage		-18		18	V		4
Analog Input Voltage Range		-40		40	V		4
Operating Temperature		-40		125	°C		4
Storage Temperature		-40		125	°C		4
Junction Temperature				150	°C		4
Lead Temperature				300	°C	soldering 10s	4

CAD (KiCad official)

Symbol: PGA205AP
Footprint: Package_DIP:DIP-16_W7.62mm
3D model: PDIP-16 (KiCad packages3D, STEP)
3D model files: pga205ap-etched.step / pga205ap-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pga205ap.step / pga205ap.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (20 pp, sha256 29698b20512c0ee8, retrieved 2026-10-28, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF