component

PGA204AP

Public Made by Adom

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Texas Instruments Pre-ordered Chips, PDIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icspga204apfactory-2.0.0extractor-text

Verified PGA204AP

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier lcsc, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: PGA204AP · PDIP-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 20-page datasheet
  • ✓distributor: lcsc C1346257, digikey 2156-PGA204AP-ND, mouser 595-PGA204AP
  • ✓family: DIP-16_W7.62mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-nogf9b69/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ pga204ap.kicad_sym✓ pga204ap.kicad_mod✓ pga204ap.step
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Ray Publish 0.1.0 7517221 10d ago

PGA204AP

Texas Instruments · Pre-ordered Chips · PDIP-16

PGA204AP from Texas Instruments, in a PDIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VO1 output VO1 is the first internal amplifier output terminal shown in the block diagram at the digitally selected feedback network, and the datasheet gives no separate electrical limit for it.
2 NC unconnected Pin 2 is marked NC (No Internal Connection) in the datasheet.
3 NC unconnected Pin 3 is marked NC (No Internal Connection) in the datasheet.
4 V-IN power_in Inverting analog input, individually protected to ±40 V safe input voltage, with input common-mode range of ±10.5 V min and ±12.7 V typ.
5 V+IN power_in Non-inverting analog input, individually protected to ±40 V safe input voltage, with input common-mode range of ±10.5 V min and ±12.7 V typ.
6 VOS Adjust passive Optional input-stage offset trim terminal; the datasheet says it should adjust only input-stage offset, with a trim range of about ±250 µV using the 200 kΩ to 1 MΩ network in Figure 3.
7 VOS Adjust passive Optional input-stage offset trim terminal; the datasheet says it should adjust only input-stage offset, with a trim range of about ±250 µV using the 200 kΩ to 1 MΩ network in Figure 3.
8 V- power_in Negative power supply; the datasheet specifies supply voltage from ±4.5 V to ±18 V (typ ±15 V).
9 VO2 output VO2 is the second internal amplifier output terminal shown in the block diagram, and the datasheet gives no separate electrical limit for it.
10 Ref input Output reference terminal, normally grounded, which must be a low-impedance connection since 5 Ω in series degrades typical CMR to about 80 dB at G=1.
11 VO output Amplifier output with a short-circuit current of +23/-17 mA and load capacitance stability of 1000 pF, and it must be connected to the Feedback pin 12.
12 Feedback input Output feedback connection that must be connected to the output terminal (pin 11) for proper operation and can sense the output voltage directly at the load.
13 V+ power_in Positive power supply; the datasheet specifies supply voltage from ±4.5 V to ±18 V (typ ±15 V).
14 Dig. Ground power_in Digital ground reference for the A0/A1 logic inputs, which may be connected to any potential from V- up to 4 V less than V+ and is normally connected to ground.
15 A0 input Gain-select logic input (TTL/CMOS compatible) where logic 1 is more than 2 V above digital ground, and about 1 µA flows out of the pin for a logic 0.
16 A1 input Gain-select logic input (TTL/CMOS compatible) where logic 1 is more than 2 V above digital ground, and about 1 µA flows out of the pin for a logic 0.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-16
Category Interface ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Common-Mode Range -10.5 12.7 V VO=0V (see text) 2
Safe Input Voltage -40 40 V 2
Common-Mode Rejection G=1 75 90 dB VCM=±10V, ∆RS=1kΩ, G=1 3
Common-Mode Rejection G=10 90 106 dB VCM=±10V, ∆RS=1kΩ, G=10 2
Common-Mode Rejection G=100 106 110 dB VCM=±10V, ∆RS=1kΩ, G=100 2
Common-Mode Rejection G=1000 106 110 dB VCM=±10V, ∆RS=1kΩ, G=1000 2
Bias Current -5 5 nA 2
Offset Current -2 2 nA 2
Gain Error G=1 -0.05 0.05 % G=1 2
Gain Error G=10 -0.05 0.05 % G=10 2
Gain Error G=100 -0.05 0.05 % G=100 2
Gain Error G=1000 -0.1 0.1 % G=1000 2
Gain vs Temperature -10 10 ppm/°C G=1 to 1000 2
Nonlinearity G=1 -0.002 0.002 % of FSR G=1 2
Nonlinearity G=10 -0.004 0.004 % of FSR G=10 2
Nonlinearity G=100 -0.004 0.004 % of FSR G=100 2
Nonlinearity G=1000 -0.02 0.02 % of FSR G=1000 2
Short Circuit Current -17 23 mA 2
Slew Rate 0.3 0.7 V/µs VO=±10V, G=10 2
Power Supply Voltage VS 4.5 15 18 V 2
Quiescent Current 7.5 mA VIN=0V 2
Specification Temperature Range -40 85 °C 2
Operating Temperature Range -40 125 °C 2
Supply Voltage -18 18 V 4
Analog Input Voltage Range -40 40 V 4
Operating Temperature -40 125 °C 4
Storage Temperature -40 125 °C 4
Junction Temperature 150 °C 4
Lead Temperature 300 °C soldering 10s 4
Noise Voltage f=10Hz 16 nV/√Hz G≥100, RS=0Ω 2
Noise Voltage f=100Hz 13 nV/√Hz G≥100, RS=0Ω 2
Noise Voltage f=1kHz 13 nV/√Hz G≥100, RS=0Ω 2
Noise Voltage fB=0.1Hz to 10Hz 0.4 µVp-p G≥100, RS=0Ω 2
Noise Current f=10Hz 0.4 pA/√Hz 2
Noise Current f=1kHz 0.2 pA/√Hz 2
Noise Current fB=0.1Hz to 10Hz 18 pAp-p 2
Bandwidth -3dB G=1 1 MHz G=1 2
Bandwidth -3dB G=10 80 kHz G=10 2
Bandwidth -3dB G=100 10 kHz G=100 2
Bandwidth -3dB G=1000 1 kHz G=1000 2
Overload Recovery 70 µs 50% Overdrive 2
Digital Input Current 1 µA 2
Load Capacitance Stability 1000 pF 2
Thermal Resistance Junction-to-Ambient θJA 80 °C/W 2

CAD (KiCad official)

  • Symbol: PGA204AP
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: PDIP-16 (KiCad packages3D, STEP)
  • 3D model files: pga204ap-etched.step / pga204ap-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pga204ap.step / pga204ap.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (20 pp, sha256 29698b20512c0ee8, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF