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PGA103U

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Texas Instruments Operational Amplifier, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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PGA103U

Texas Instruments · Operational Amplifier · SO-8

PGA103U from Texas Instruments, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Digital gain-select input (CMOS/TTL compatible), referenced to ground pin 3; logic 0 is -5.6 V to 0.8 V and logic 1 is 2 V to V+.
2 A1 input Digital gain-select input (CMOS/TTL compatible), referenced to ground pin 3; logic 0 is -5.6 V to 0.8 V and logic 1 is 2 V to V+, with A0/A1 both at logic 1 being an invalid gain code.
3 Ground power_in Reference terminal for the analog input, output and logic inputs; it must be a low-impedance connection, since 0.1 Ω in series with this pin reduces G=100 gain by about 0.2%.
4 VIN power_in Analog signal input referred to the ground terminal (pin 3), with an absolute maximum analog input range of V- to V+.
5 NC unconnected No internal connection.
6 V- power_in Negative power supply; operates from ±4.5 V to ±18 V with an absolute maximum supply of ±18 V.
7 VO output Amplifier output referred to ground pin 3, swinging to within (V+) -2.5 V to -3.5 V and (V-) +2.5 V to +3.5 V, with maximum load capacitance of 1000 pF and short-circuit current of ±25 mA.
8 V+ power_in Positive power supply; operates from ±4.5 V to ±18 V with an absolute maximum supply of ±18 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SO-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Offset Voltage, RTI -1500 200 1500 µV G = 1, TA = +25°C 2
Offset Voltage, RTI -500 100 500 µV G = 10 2
Offset Voltage vs Temperature -5 5 µV/°C TA = TMIN to TMAX, G = 1 2
Offset Voltage vs Temperature -2 2 µV/°C TA = TMIN to TMAX, G = 10 2
Offset Voltage vs Power Supply 30 70 µV/V VS = ±4.5V to ±18V, G = 1 2
Offset Voltage vs Power Supply 10 35 µV/V VS = ±4.5V to ±18V, G = 10 2
Initial Bias Current -150 50 150 nA 2
Input Bias Current vs Temperature -100 100 pA/°C 2
Gain Error -0.02 0.005 0.02 % G = 1 2
Gain Error -0.05 0.02 0.05 % G = 10 2
Gain Error -0.2 0.04 0.2 % G = 100 2
Gain vs Temperature -2 2 ppm/°C G = 1 2
Gain vs Temperature -10 10 ppm/°C G = 10 2
Gain vs Temperature -30 30 ppm/°C G = 100 2
Nonlinearity -0.003 0.001 0.003 % of FSR G = 1 2
Nonlinearity -0.005 0.002 0.005 % of FSR G = 10 2
Nonlinearity -0.01 0.004 0.01 % of FSR G = 100 2
Output Voltage, Positive (referenced to V+) -3.5 -2.5 V 2
Output Voltage, Negative (referenced to V-) 2.5 3.5 V 2
Load Capacitance 1000 pF 2
Short-Circuit Current -25 25 mA 2
Digital Low Voltage -5.6 0.8 V 2
Digital High Voltage 2 V 2
Voltage Range (dual supply magnitude) 4.5 15 18 V 3
Quiescent Current 2.6 3.5 mA VIN = 0V 3
Specification Temperature Range -40 85 °C 3
Operating Temperature Range -40 125 °C 3
Supply Voltage 18 V 3
Operating Temperature -40 125 °C 3
Storage Temperature -40 125 °C 3
Junction Temperature 150 °C 3
Lead Temperature 300 °C soldering, 10s 3
Thermal Resistance, junction-to-ambient (θJA), P or U package θJA 100 °C/W P or U package 3

CAD (KiCad official)

  • Symbol: PGA103U
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: pga103u-etched.step / pga103u-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pga103u.step / pga103u.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (10 pp, sha256 4508f3cb769b4153, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF