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PG12FBUSC
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Leiditech ESD And Surge Protection (TVS/ESD), SOD-323. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PG12FBUSC
Leiditech · ESD And Surge Protection (TVS/ESD) · SOD-323
PG12FBUSC from Leiditech, in a SOD-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Bidirectional TVS terminal 1 (interchangeable with pin 2), 12V reverse working voltage, 14.2V min breakdown at 1mA, 24V max clamping at 15A (8/20µs). |
| 2 | 2 | passive | Bidirectional TVS terminal 2 (interchangeable with pin 1), 12V reverse working voltage, ±30kV IEC 61000-4-2 ESD air and contact discharge. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Leiditech |
| Package | SOD-323 |
| Category | Circuit Protection |
| Pins | 2 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Peak Pulse Power (8/20µs) | Ppp | 360 | W | 1 | |||
| ESD per IEC 61000-4-2 (Air) | VESD | -30 | 30 | Kv | 1 | ||
| ESD per IEC 61000-4-2 (Contact) | VESD | -30 | 30 | Kv | 1 | ||
| Operating Temperature Range | TJ | -55 | 150 | ℃ | 1 | ||
| Storage Temperature Range | TSTJ | -55 | 150 | ℃ | 1 | ||
| Reverse Working Voltage | VRWM | 12 | V | 2 | |||
| Breakdown Voltage | VBR | 14.2 | V | IT = 1mA | 2 | ||
| Reverse Leakage Current | IR | 0.1 | µA | VRWM = 12V | 2 | ||
| Clamping Voltage | VC | 24 | V | IPP = 15A (8 x 20 s pulse) | 2 | ||
| Junction Capacitance | CJ | 45 | pF | V = 0V, f = 1MHz | 2 |
CAD (KiCad official)
- Symbol:
PG12FBUSC - Footprint:
Diode_SMD:D_SOD-323 - 3D model: SOD-323 (KiCad packages3D, STEP)
- 3D model files:
pg12fbusc-etched.step/pg12fbusc-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pg12fbusc.step/pg12fbusc.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Leiditech datasheet (3 pp, sha256
7339d6daf206a56c, retrieved 2026-11-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PG12FBUSC
**Leiditech** · ESD And Surge Protection (TVS/ESD) · SOD-323
PG12FBUSC from Leiditech, in a SOD-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1 | passive | Bidirectional TVS terminal 1 (interchangeable with pin 2), 12V reverse working voltage, 14.2V min breakdown at 1mA, 24V max clamping at 15A (8/20µs). |
| 2 | 2 | passive | Bidirectional TVS terminal 2 (interchangeable with pin 1), 12V reverse working voltage, ±30kV IEC 61000-4-2 ESD air and contact discharge. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Leiditech |
| Package | SOD-323 |
| Category | Circuit Protection |
| Pins | 2 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Peak Pulse Power (8/20µs) | Ppp | | | 360 | W | | 1 |
| ESD per IEC 61000-4-2 (Air) | VESD | -30 | | 30 | Kv | | 1 |
| ESD per IEC 61000-4-2 (Contact) | VESD | -30 | | 30 | Kv | | 1 |
| Operating Temperature Range | TJ | -55 | | 150 | ℃ | | 1 |
| Storage Temperature Range | TSTJ | -55 | | 150 | ℃ | | 1 |
| Reverse Working Voltage | VRWM | | 12 | | V | | 2 |
| Breakdown Voltage | VBR | | 14.2 | | V | IT = 1mA | 2 |
| Reverse Leakage Current | IR | | 0.1 | | µA | VRWM = 12V | 2 |
| Clamping Voltage | VC | | 24 | | V | IPP = 15A (8 x 20 s pulse) | 2 |
| Junction Capacitance | CJ | | 45 | | pF | V = 0V, f = 1MHz | 2 |
## CAD (KiCad official)
- Symbol: `PG12FBUSC`
- Footprint: `Diode_SMD:D_SOD-323`
- 3D model: SOD-323 (KiCad packages3D, STEP)
- 3D model files: `pg12fbusc-etched.step` / `pg12fbusc-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pg12fbusc.step` / `pg12fbusc.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Leiditech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590454469227290624) (3 pp, sha256 `7339d6daf206a56c`, retrieved 2026-11-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pg12fbusc-datasheet.pdf)