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PFS154-S08

PADAUK Tech · Microcontrollers (MCU/MPU/SOC) · SOP-8

PFS154-S08 from PADAUK Tech, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Positive power supply; operating range 2.0V to 5.5V, must not exceed 5.5V.
2 PA7/X1 bidirectional Port A bit 7 programmable input/output with weak pull-up, or crystal oscillator X1; clear padier bit 7 to disable the digital input when used as crystal pin to reduce leakage.
3 PA6/X2 bidirectional Port A bit 6 programmable input/output with weak pull-up, or crystal oscillator X2; clear padier bit 6 to disable the digital input when used as crystal pin to reduce leakage.
4 PA5/PRST#/PG2PWM bidirectional External reset input (PRST#), or Port A bit 5 input/open-drain output with weak pull-up, or PWMG2 output; a 33 ohm series resistor is advised for high noise immunity when used as input.
5 PA3/TM2PWM/COM4/CIN1-/PG2PWM bidirectional Port A bit 3 input/output with weak pull-up, Timer2 output, comparator negative input 1, LCD COM4 at 1/2 VDD, or PWMG2 output; clear padier bit 3 when used as analog input.
6 PA4/COM3/CIN+/CIN4-/PG1PWM bidirectional Port A bit 4 input/output with weak pull-up, LCD COM3 at 1/2 VDD, comparator positive input or negative input 4, or PWMG1 output; clear padier bit 4 when used as analog input.
7 PA0/INT0/COM2/CO/PG0PWM bidirectional Port A bit 0 input/output with weak pull-up, external interrupt 0 on rising and falling edges, comparator output, LCD COM2 at 1/2 VDD, or PWMG0 output.
8 GND power_in Ground.

Key specifications

Parameter Value
Manufacturer PADAUK Tech
Package SOP-8
Category Embedded Processors & Controllers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating voltage VDD 2 5.5 V Limited by LVR setting 15
LVR low-voltage reset tolerance LVR% -5 5 % 15
System clock fSYS = IHRC/2 fSYS 0 8 MHz VDD≧3.5V 15
System clock fSYS = IHRC/4 fSYS 0 4 MHz VDD≧2.5V 15
System clock fSYS = IHRC/8 fSYS 0 2 MHz VDD≧2.0V 15
Power-on reset voltage VPOR 1.9 2 2.1 V 15
Operating current, fSYS = IHRC/16 IOP 0.3 mA fSYS=IHRC/16=1MIPS@3V 15
Operating current, fSYS = ILRC IOP 12 uA fSYS=ILRC=70KHz@3V 15
Operating current, fSYS = EOSC (reserved) IOP 10 uA fSYS=EOSC=32KHz@3V (reserved) 15
Power-down mode current (stopsys) IPD 0.5 uA fSYS=0Hz, VDD=3.3V 15
Power-saving mode current (stopexe, IHRC off) IPS 5 uA VDD=3.3V 15
Input low voltage VIL 0 V 15
IO output sink current, normal, PA0/PA3/PA4/PB2/PB5/PB6 IOL 10 mA VDD=3.3V, VOL=0.33V 15
IO output sink current, normal, PA6/PA7/PB0/PB1/PB3/PB4/PB7 IOL 6 mA VDD=3.3V, VOL=0.33V 15
IO output sink current, normal, PA5 IOL 5 mA VDD=3.3V, VOL=0.33V 15
IO output sink current, low, PA5 IOL 5 mA VDD=3.3V, VOL=0.33V, low mode 15
IO output sink current, low, other IO IOL 2 mA VDD=3.3V, VOL=0.33V, low mode 15
IO output drive current, normal IOH -5 mA VDD=3.3V, VOH=2.97V 15
IO output drive current, low IOH -1.6 mA VDD=3.3V, VOH=2.97V 15
Input voltage VIN -0.3 V 15
Pin injection current IINJ (PIN) 1 mA VDD+0.3 ≧ VIN ≧ -0.3 15
Input pin interrupt pulse width tINT 30 ns VDD=3.3V 15
IHRC calibrated output frequency fIHRC 15.84 16 16.16 MHz VDD=5V, Ta=25°C 15
IHRC calibrated output frequency fIHRC 15.2 16.8 MHz VDD=2.2V~5.5V, -20°C<Ta<70°C 15
IHRC calibrated output frequency fIHRC 13.6 18.4 MHz VDD=2.0V~5.5V, -20°C<Ta<70°C 15
Data memory retention voltage VDR 1.5 V Power-down mode 15
Power supply (absolute maximum range) 2 5.5 V Must not exceed 5.5V or IC may be damaged 16
Input voltage (absolute maximum) -0.3 V Range -0.3V to VDD+0.3V 16
Operating temperature (absolute maximum range) -20 70 °C 16
Storage temperature -50 125 °C 16
Junction (node) temperature 150 °C 16
Comparator offset voltage (design reference) CPos 10 20 mV 16
Comparator common-mode input voltage (design reference) CPcm 0 V 16
Comparator response time CPspt 100 500 ns Rising and falling edge the same 16
Comparator mode change settling time CPmc 2.5 7.5 us 16
Comparator current consumption CPcs 20 uA VDD=3.3V 16
External reset pulse width tRST 120 us @ VDD=5V 15
System power-on boot time (normal) tSBP 47 ms Normal boot, @VDD=5V 16
System power-on boot time (fast boot) tSBP 780 us Fast boot, @VDD=5V 16
Fast wake-up time tWUP 45 TILRC misc.5=1 or fast boot 16
Normal wake-up time tWUP 3000 TILRC misc.5=0 or normal boot 16
Watchdog timeout tWDT 8192 TILRC misc[1:0]=00 (default) 16
Watchdog timeout tWDT 16384 TILRC misc[1:0]=01 16
Watchdog timeout tWDT 65536 TILRC misc[1:0]=10 16
Watchdog timeout tWDT 262144 TILRC misc[1:0]=11 16
ILRC system clock (nominal) fSYS 70 kHz VDD = 3V 15

CAD (KiCad official)

  • Symbol: PFS154-S08
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: pfs154-s08-etched.step / pfs154-s08-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pfs154-s08.step / pfs154-s08.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PADAUK Tech datasheet (84 pp, sha256 5343a81ee5e4fb70, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF