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Ray Publish 0.1.0 1f80aad 27d ago

PESD5V0F1BL

UMW · ESD And Surge Protection (TVS/ESD) · SOD-882

PESD5V0F1BL from UMW, in a SOD-882. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 K1 passive One terminal of the bidirectional ESD protection line, with ESD protection up to 10kV per IEC61000-4-2 level 4 and a clamping voltage of 30V at 30ns and ±8kV.
2 K2 passive The other terminal of the bidirectional ESD protection line, with ESD protection up to 10kV per IEC61000-4-2 level 4 and a clamping voltage of 30V at 30ns and ±8kV.

Key specifications

Parameter Value
Manufacturer UMW
Package SOD-882
Category Circuit Protection
Pins 2

CAD (KiCad official)

  • Symbol: PESD5V0F1BL
  • Footprint: Diode_SMD:D_SOD-882
  • 3D model: SOD-882 (KiCad packages3D, STEP)
  • 3D model files: pesd5v0f1bl-etched.step / pesd5v0f1bl-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pesd5v0f1bl.step / pesd5v0f1bl.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (8 pp, sha256 dd83b1fecea4f402, retrieved 2026-10-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF