component

PE43705B-Z

Public Made by Adom

by adom

PSemi RF attenuator, VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentradio frequency chip-antennape43705b-zfactory-2.0.0extractor-text

Verified PE43705B-Z

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier lcsc, 33 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: PE43705B-Z · VQFN-32-EP(5x5) · 33 pins
  • ✓copper: 33 copper pads, none touching another net
  • ✓datasheet: all 33 pin names found in the 18-page datasheet
  • ✓distributor: lcsc C2654161, digikey 1046-1092-2-ND, mouser 81-PE43705B-Z
  • ✓family: QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-5n4k3nuz/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 33 pins = 33 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 33 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ pe43705b-z.kicad_sym✓ pe43705b-z.kicad_mod✓ pe43705b-z.step
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PE43705B-Z

PSemi · RF attenuator · VQFN-32-EP(5x5)

PE43705B-Z from PSemi, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 N/C unconnected No connect.
2 VDD power_in Supply voltage, operating range 2.3 V to 5.5 V.
3 P/S input Serial/parallel mode select; LOW selects the parallel interface and HIGH selects the serial addressable interface.
4 A0 input Address bit A0 connection, compared against the serial address word.
5 GND power_in Ground.
6 GND power_in Ground.
7 RF1 passive RF1 port (RF input); must be at 0 V DC, and no DC blocking capacitor is needed if that is met.
8 GND power_in Ground.
9 GND power_in Ground.
10 GND power_in Ground.
11 GND power_in Ground.
12 GND power_in Ground.
13 GND power_in Ground.
14 GND power_in Ground.
15 GND power_in Ground.
16 GND power_in Ground.
17 GND power_in Ground.
18 RF2 passive RF2 port (RF output); must be at 0 V DC, and no DC blocking capacitor is needed if that is met.
19 GND power_in Ground.
20 GND power_in Ground.
21 A2 input Address bit A2 connection, compared against the serial address word.
22 A1 input Address bit A1 connection, compared against the serial address word.
23 LE input Serial interface latch enable input; also latches parallel data, and is tied HIGH for direct parallel mode.
24 CLK input Serial interface clock input, maximum 10 MHz.
25 SI input Serial interface data input.
26 C16 (D6) input Parallel control bit, 16 dB; ground if not in use.
27 C8 (D5) input Parallel control bit, 8 dB; ground if not in use.
28 C4 (D4) input Parallel control bit, 4 dB; ground if not in use.
29 C2 (D3) input Parallel control bit, 2 dB; ground if not in use.
30 C1 (D2) input Parallel control bit, 1 dB; ground if not in use.
31 C0.5 (D1) input Parallel control bit, 0.5 dB; ground if not in use.
32 C0.25 (D0) input Parallel control bit, 0.25 dB; ground if not in use.
33 GND passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer PSemi
Package VQFN-32-EP(5x5)
Category Radio Frequency Chip/Antenna
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VDD 2.3 5.5 V 5
Supply current IDD 130 200 μA 5
Digital input high VIH 1.17 3.6 V 5
Digital input low VIL -0.3 0.6 V 5
Digital input current ICTRL 15 μA 5
RF input power, CW PMAX,CW 28 dBm 5
RF input power, pulsed PMAX,PULSED 31 dBm Pulsed, 2.5% duty cycle of 4620 µs period, 50Ω 5
Operating temperature range TOP -40 105 °C 5
Supply voltage (abs max) VDD -0.3 5.5 V 5
Digital input voltage VCTRL -0.3 3.6 V 5
Maximum input power PMAX,ABS 34 dBm 5
Storage temperature range TST -65 150 °C 5
ESD voltage HBM VESD,HBM 1500 V all pins 5
ESD voltage MM VESD,MM 200 V all pins 5
ESD voltage CDM VESD,CDM 250 V all pins 5
Operating frequency (0.25 dB step) 50 6000 MHz 0.25 dB steps 2
Insertion loss 50 MHz-2.2 GHz (0.25 dB step) 1.3 1.6 dB 0.25 dB steps, 50 MHz, 2.2 GHz 2
Insertion loss 2.2-4 GHz (0.25 dB step) 1.7 2 dB 0.25 dB steps, 2.2 GHz, 4 GHz 2
Insertion loss 4-6 GHz (0.25 dB step) 2.4 2.8 dB 0.25 dB steps, 4 GHz, 6 GHz 2
Return loss input 50 MHz-4 GHz (0.25 dB step) 20 dB 0.25 dB steps, Input port, 50 MHz, 4 GHz 2
Return loss input 4-6 GHz (0.25 dB step) 15 dB 0.25 dB steps, Input port, 4 GHz, 6 GHz 2
Return loss output 50 MHz-4 GHz (0.25 dB step) 17 dB 0.25 dB steps, Output port, 50 MHz, 4 GHz 2
Return loss output 4-6 GHz (0.25 dB step) 13 dB 0.25 dB steps, Output port, 4 GHz, 6 GHz 2
Input 0.1dB compression point (0.25 dB step) 34 dBm 50 MHz, 6 GHz 2
Input IP3 58 dBm Two tones at +20 dBm, 500 kHz spacing, 50 MHz, 6 GHz 2
Switching time 1 µs 50% CTRL to 90% or 10% RF 2
Serial clock frequency FCLK 10 MHz VDD = 3.4V or 5.0V, -40°C < TA < 105°C 9
Serial clock HIGH time TCLKH 30 ns VDD = 3.4V or 5.0V, -40°C < TA < 105°C 9
Serial clock LOW time TCLKL 30 ns VDD = 3.4V or 5.0V, -40°C < TA < 105°C 9
Latch enable min. pulse width TLEPW 30 ns VDD = 3.4V or 5.0V, -40°C < TA < 105°C 9
Serial data setup time TSISU 10 ns VDD = 3.4V or 5.0V, -40°C < TA < 105°C 9
Parallel data setup time TDISU 100 ns VDD = 3.4V or 5.0V, -40°C < TA < 105°C 9

CAD (KiCad official)

  • Symbol: PE43705B-Z
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: pe43705b-z-etched.step / pe43705b-z-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pe43705b-z.step / pe43705b-z.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PSemi datasheet (18 pp, sha256 d2d3044d09d0994f, retrieved 2026-10-31, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF