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PDTD143ETR

Public Made by Adom

by adom

Nexperia Digital Transistors, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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pdtd143etr-hero.glb pdtd143etr: hero GLB from the etched model (keeps the MPN mark) · Ray 28d ago
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PDTD143ETR

Nexperia · Digital Transistors · SOT-23

PDTD143ETR from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I input Input (base) of the built-in bias resistor network (R1 = 4.7 kΩ); the datasheet's positive input voltage limit is -10 V to 30 V.
2 GND power_in Ground (emitter) connection of the transistor.
3 O output Output (collector) of the transistor, rated for an output current of 500 mA.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-23
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: PDTD143ETR
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: pdtd143etr-etched.step / pdtd143etr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pdtd143etr.step / pdtd143etr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (13 pp, sha256 4b470c2081a958c9, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF