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PDTD113ZT

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by adom

Nexperia Digital Transistors, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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PDTD113ZT

Nexperia · Digital Transistors · SOT-23

PDTD113ZT from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I input Input (base) of the transistor, which is rated for input voltages from -5 V to 10 V and has a built-in 1 kΩ bias resistor R1 (0.7 to 1.3 kΩ).
2 GND power_in Ground, connected to the emitter of the transistor.
3 O output Output (collector) of the transistor, rated for an output current of up to 500 mA.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector-base voltage VCBO 50 V open emitter 2
Collector-emitter voltage VCEO 50 V open base 2
Emitter-base voltage VEBO 5 V open collector 2
Input voltage VI 10 V positive 2
Input voltage VI -5 V negative 2
Output current IO 500 mA 2
Total power dissipation Ptot 250 mW Tamb ≤ 25 °C [1] 2
Junction temperature Tj 150 °C 2
Ambient temperature Tamb -65 150 °C 2
Storage temperature Tstg -65 150 °C 2
Thermal resistance from junction to ambient Rth(j-a) 500 K/W in free air [1] 2
Collector-base cut-off current ICBO 100 nA VCB = 40 V; IE = 0 A; Tamb = 25 °C 3
Collector-emitter cut-off current ICEO 0.5 µA VCE = 50 V; IB = 0 A; Tamb = 25 °C 3
Emitter-base cut-off current IEBO 0.8 mA VEB = 5 V; IC = 0 A; Tamb = 25 °C 3
DC current gain hFE 70 VCE = 5 V; IC = 50 mA; Tamb = 25 °C 3
Collector-emitter saturation voltage VCEsat 300 mV IC = 50 mA; IB = 2.5 mA; Tamb = 25 °C 3
Off-state input voltage VI(off) 0.3 0.6 1 V VCE = 5 V; IC = 100 µA; Tamb = 25 °C 3
On-state input voltage VI(on) 0.4 0.8 1.4 V VCE = 0.3 V; IC = 20 mA; Tamb = 25 °C 3
Bias resistor 1 (input) R1 0.7 1 1.3 kΩ 3
Bias resistor ratio R2/R1 9 10 11 Tamb = 25 °C 3

CAD (KiCad official)

  • Symbol: PDTD113ZT
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: pdtd113zt-etched.step / pdtd113zt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pdtd113zt.step / pdtd113zt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (8 pp, sha256 81522e1a5c5fdb17, retrieved 2026-10-15, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF