component

PDTC144WU

Public Made by Adom

by adom

Nexperia Digital Transistors, SOT-323-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorspdtc144wufactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

PDTC144WU

Nexperia · Digital Transistors · SOT-323-3

PDTC144WU from Nexperia, in a SOT-323-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I input Input (base) of the built-in bias network, with R1 = 47 kΩ (Table 1); the input voltage VI is limited to -10 V to 40 V (Table 5, page 2).
2 GND power_in Ground (emitter) connection, the common return for the transistor and its bias resistors.
3 O output Output (collector) connection; limited by VCEO of 50 V and output current IO of 100 mA (Table 5, page 2).

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-323-3
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
collector-base voltage VCBO 50 V open emitter 2
collector-emitter voltage VCEO 50 V open base 2
emitter-base voltage VEBO 10 V open collector 2
input voltage VI -10 40 V 2
output current IO 100 mA 2
peak collector current ICM 100 mA tp ≤ 1 ms; single pulse 2
total power dissipation Ptot 200 mW Tamb ≤ 25 °C 2
junction temperature Tj 150 °C 2
ambient temperature Tamb -65 150 °C 2
storage temperature Tstg -65 150 °C 2
thermal resistance from junction to ambient Rth(j-a) 625 K/W in free air 2
collector-base cut-off current ICBO 100 nA VCB = 50 V; IE = 0 A; Tamb = 25 °C 3
collector-emitter cut-off current ICEO 100 nA VCE = 30 V; IB = 0 A; Tamb = 25 °C 3
collector-emitter cut-off current ICEO 5 µA VCE = 30 V; IB = 0 A; Tj = 150 °C 3
emitter-base cut-off current IEBO 110 µA VEB = 5 V; IC = 0 A; Tamb = 25 °C 3
DC current gain hFE 60 VCE = 5 V; IC = 5 mA; Tamb = 25 °C 3
collector-emitter saturation voltage VCEsat 150 mV IC = 10 mA; IB = 0.5 mA; Tamb = 25 °C 3
off-state input voltage VI(off) 1.7 1.2 V VCE = 5 V; IC = 100 µA; Tamb = 25 °C 3
on-state input voltage VI(on) 4 2.7 V VCE = 0.3 V; IC = 2 mA; Tamb = 25 °C 3
bias resistor 1 (input) R1 33 47 61 kΩ 3
bias resistor ratio R2/R1 R2/R1 0.37 0.47 0.57 Tamb = 25 °C 3
collector capacitance Cc 2.5 pF VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 °C 3

CAD (KiCad official)

  • Symbol: PDTC144WU
  • Footprint: Package_TO_SOT_SMD:SOT-323_SC-70
  • 3D model: SOT-323-3 (KiCad packages3D, STEP)
  • 3D model files: pdtc144wu-etched.step / pdtc144wu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pdtc144wu.step / pdtc144wu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (7 pp, sha256 d73bd6f44cb9d83c, retrieved 2026-10-16, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF