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Contents

README

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PDTC144VT

Nexperia · Digital Transistors · SOT-23

PDTC144VT from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I input Input (base) of the transistor, connected to the built-in bias resistor R1 = 47 kΩ as shown in the graphic symbol.
2 GND power_in Ground connection serving as the emitter of the transistor, returning the R2 = 10 kΩ bias network to ground.
3 O output Output (collector) of the transistor, rated for an output current IO of 100 mA and a collector-emitter voltage VCEO of 50 V (open base).

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
collector-base voltage VCBO 50 V open emitter 3
collector-emitter voltage VCEO 50 V open base 3
emitter-base voltage VEBO 15 V open collector 3
output current IO 100 mA 3
peak collector current ICM 100 mA 3
total power dissipation Ptot 250 mW Tamb ≤ 25 °C [1] 3
junction temperature Tj 150 °C 3
ambient temperature Tamb -65 150 °C 3
storage temperature Tstg -65 150 °C 3
thermal resistance from junction to ambient Rth(j-a) 500 K/W in free air [1] 3
collector-base cut-off current ICBO 100 nA VCB = 50 V; IE = 0 A; Tamb = 25 °C 4
collector-emitter cut-off current ICEO 100 nA VCE = 30 V; IB = 0 A; Tamb = 25 °C 4
collector-emitter cut-off current ICEO 5 µA VCE = 30 V; IB = 0 A; Tj = 150 °C 4
emitter-base cut-off current IEBO 150 µA VEB = 5 V; IC = 0 A; Tamb = 25 °C 4
DC current gain hFE 40 VCE = 5 V; IC = 5 mA; Tamb = 25 °C 4
collector-emitter saturation voltage VCEsat 150 mV IC = 10 mA; IB = 0.5 mA; Tamb = 25 °C 4
off-state input voltage VI(off) 3.1 1 V VCE = 5 V; IC = 100 µA; Tamb = 25 °C 4
on-state input voltage VI(on) 6 3.8 V VCE = 300 mV; IC = 2 mA; Tamb = 25 °C 4
bias resistor 1 (input) R1 33 47 61 kΩ 4
bias resistor ratio R2/R1 0.17 0.21 0.26 Tamb = 25 °C 4
collector capacitance Cc 2 pF VCB = 10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 °C 4

CAD (KiCad official)

  • Symbol: PDTC144VT
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: pdtc144vt-etched.step / pdtc144vt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pdtc144vt.step / pdtc144vt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (11 pp, sha256 b7c2f0780d69eb30, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF