# PDTC144ET

**Nexperia** · Digital Transistors · SOT-23

PDTC144ET from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I | input | Input (base) with internal bias resistor (47 kΩ typical); input voltage range -10 V to 40 V. |
| 2 | GND | power_in | Ground/emitter connection of NPN transistor. |
| 3 | O | output | Collector output; maximum 100 mA output current and 50 V maximum collector-emitter voltage. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `PDTC144ET`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `pdtc144et-etched.step` / `pdtc144et-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pdtc144et.step` / `pdtc144et.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Nexperia datasheet](https://assets.nexperia.com/documents/data-sheet/PDTC144ET.pdf) (12 pp, sha256 `4739dde1e36b2b21`, retrieved 2026-09-18, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/pdtc144et-datasheet.pdf)