component
PDTC114YT-QR
Public Made by Adomby adom
Nexperia ESD And Surge Protection (TVS/ESD), SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPDTC114YT-QR
Nexperia · ESD And Surge Protection (TVS/ESD) · SOT-23
PDTC114YT-QR from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I | input | Input (base) of the built-in NPN transistor, connected to bias resistor R1 (10 kΩ typical); the datasheet limits the input voltage to 40 V positive and -6 V negative. |
| 2 | GND | power_in | Ground (emitter) connection of the built-in transistor. |
| 3 | O | output | Output (collector) of the built-in transistor, rated for 100 mA output current and 50 V collector-emitter voltage with open base. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-23 |
| Category | Circuit Protection |
| Pins | 3 |
CAD (KiCad official)
- Symbol:
PDTC114YT-QR - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
pdtc114yt-qr-etched.step/pdtc114yt-qr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pdtc114yt-qr.step/pdtc114yt-qr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (11 pp, sha256
b9f3d94b9b3232a0, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).