component
PDTA113ZT
Public Made by Adomby adom
Nexperia Digital Transistors, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPDTA113ZT
Nexperia · Digital Transistors · SOT-23
PDTA113ZT from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | I | input | Input terminal (base) of the bias network, connected through the built-in 1 kΩ R1 resistor; the datasheet limits the input voltage to -10 V to 5 V. |
| 2 | G | power_in | Ground terminal, labelled GND (emitter) in the pinning table, serving as the common emitter reference for the transistor. |
| 3 | O | output | Output terminal (collector); the output current is limited to -100 mA and the collector-emitter voltage to -50 V with open base. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Collector-base voltage | VCBO | -50 | V | open emitter | 2 | ||
| Collector-emitter voltage | VCEO | -50 | V | open base | 2 | ||
| Emitter-base voltage | VEBO | -5 | V | open collector | 2 | ||
| Input voltage | VI | -10 | 5 | V | 2 | ||
| Output current | IO | -100 | mA | 2 | |||
| Total power dissipation | Ptot | 250 | mW | Tamb ≤ 25 °C | 2 | ||
| Junction temperature | Tj | 150 | °C | 2 | |||
| Ambient temperature | Tamb | -65 | 150 | °C | 2 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 2 | ||
| Thermal resistance from junction to ambient | Rth(j-a) | 500 | K/W | in free air | 2 | ||
| Collector-base breakdown voltage | V(BR)CBO | -100 | V | IC = -100 µA; Tlead = 0 °C; Tamb = 25 °C | 3 | ||
| Collector-emitter breakdown voltage | V(BR)CEO | -100 | V | IC = -2 mA; IB = 0; Tamb = 25 °C | 3 | ||
| Collector-base cut-off current | ICBO | -100 | nA | VCB = -50 V; IE = 0 A; Tamb = 25 °C | 3 | ||
| Collector-emitter cut-off current | ICEO | -1 | µA | VCE = -30 V; IB = 0 A; Tamb = 25 °C | 3 | ||
| Collector-emitter cut-off current | ICEO | -50 | µA | VCE = -30 V; IB = 0 A; Tj = 150 °C | 3 | ||
| Emitter-base cut-off current | IEBO | -800 | µA | VEB = -5 V; IC = 0 A; Tamb = 25 °C | 3 | ||
| DC current gain | hFE | 35 | VCE = -5 V; IC = -5 mA; Tamb = 25 °C | 3 | |||
| Collector-emitter saturation voltage | VCEsat | -150 | mV | IC = -10 mA; IB = -0.5 mA; Tamb = 25 °C | 3 | ||
| Off-state input voltage | VI(off) | -0.65 | -0.3 | V | VCE = -5 V; IC = -100 µA; Tamb = 25 °C | 3 | |
| On-state input voltage | VI(on) | -2.5 | -0.95 | V | VCE = -300 mV; IC = -20 mA; Tamb = 25 °C | 3 | |
| Bias resistor 1 (input) | R1 | 0.7 | 1 | 1.3 | kΩ | 3 | |
| Bias resistor ratio | R2/R1 | 8 | 10 | 12 | Tamb = 25 °C | 3 | |
| Collector capacitance | Cc | 2 | pF | VCB = -10 V; IE = 0 A; ie = 0 A; f = 1 MHz; Tamb = 25 °C | 3 |
CAD (KiCad official)
- Symbol:
PDTA113ZT - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
pdta113zt-etched.step/pdta113zt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pdta113zt.step/pdta113zt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (10 pp, sha256
461ac17cd9211039, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).