component
PCM5242RHBR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPCM5242RHBR
Texas Instruments · Digital To Analog Converters (DAC) · VQFN-32-EP(5x5)
PCM5242RHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | XSMT | input | Soft mute control pin with failsafe LVCMOS Schmitt trigger input; assert low for soft digital attenuation ramp, high for soft un-mute. |
| 2 | LDOO | power_out | Internal logic supply rail output from onchip 1.8V LDO; requires 0.1µF decoupling capacitor or can accept external 1.8V supply to bypass LDO. |
| 3 | DGND | power_in | Digital ground; must be connected to board ground and tied together with all ground signals within 0.2V maximum voltage difference. |
| 4 | DVDD | power_in | Digital power supply voltage; 1.8V or 3.3V operating range 1.65V to 3.46V; serves as IO voltage level and input to internal 1.8V LDO. |
| 5 | CPVDD | power_in | Charge pump power supply voltage; 3.3V nominal with operating range 3.1V to 3.46V. |
| 6 | CAPP | output | Charge pump flying capacitor pin for positive rail; requires external capacitor for charge pump operation. |
| 7 | CPGND | power_in | Charge pump ground connection. |
| 8 | CAPM | output | Charge pump flying capacitor pin for negative rail; requires external capacitor for charge pump operation. |
| 9 | VNEG | power_out | Negative charge pump rail output at -3.3V nominal; requires external decoupling capacitor for stability. |
| 10 | OUTLP | output | Positive differential analog output from left DAC channel; 2.1VRMS ground-centered output with 4.2VRMS differential swing capability. |
| 11 | OUTLN | output | Negative differential analog output from left DAC channel; 2.1VRMS ground-centered output with 4.2VRMS differential swing capability. |
| 12 | OUTRN | output | Negative differential analog output from right DAC channel; 2.1VRMS ground-centered output with 4.2VRMS differential swing capability. |
| 13 | OUTRP | output | Positive differential analog output from right DAC channel; 2.1VRMS ground-centered output with 4.2VRMS differential swing capability. |
| 14 | AVDD | power_in | Analog power supply voltage; 3.3V nominal with operating range 3.0V to 3.6V; powers analog circuits including ADC, PGA, and voltage reference. |
| 15 | AGND | power_in | Analog ground; must be connected to board ground and tied together with digital grounds within 0.2V maximum voltage difference. |
| 16 | VCOM | output | Common-mode voltage output in VCOM mode (optional); ties to GND in default VREF mode; in hardware mode this pin functions as DEMP (de-emphasis control for 44.1kHz). |
| 17 | SDA/MOSI | bidirectional | I2C data line (open-drain configuration) in I2C mode; serial input data in SPI mode; digital gain control (ATT2) in hardware mode. |
| 18 | SCL/MC | input | I2C clock input in I2C mode; serial bit clock input in SPI mode; digital gain control (ATT1) in hardware mode. |
| 19 | GPIO5 | bidirectional | General-purpose digital input/output port with internal pulldown in I2C/SPI modes; digital gain control (ATT0) in hardware mode. |
| 20 | GPIO4 | bidirectional | General-purpose digital input/output port with internal pulldown in I2C/SPI modes; I2S master clock select (MAST) in hardware mode. |
| 21 | GPIO3 | bidirectional | General-purpose digital input/output port with internal pulldown in I2C/SPI modes; analog gain selector (AGNS) in hardware mode. |
| 22 | GPIO2 | bidirectional | I2C device select bit (ADR2) or general-purpose I/O in SPI mode; general-purpose output in hardware mode. |
| 23 | MODE1 | input | Mode control selection pin; high selects SPI mode; low with MODE2=high selects I2C mode; low with MODE2=low selects hardware mode. |
| 24 | MODE2/MS | input | Mode control selection pin; in I2C mode enables auto-increment mode; in SPI mode serves as chip select (MS); see MODE1 for mode selection logic. |
| 25 | GPIO6 | bidirectional | General-purpose digital input/output port with internal pulldown in I2C/SPI modes; filter select (FLT) in hardware mode for normal or low-latency. |
| 26 | SCK | input | System master clock input accepting 1MHz to 50MHz with low phase jitter; used to generate all internal clocks via PLL or direct division. |
| 27 | BCK | bidirectional | Audio data bit clock; input in slave mode or output in master mode; maximum frequency 24.576MHz at 3.3V DVDD, 12.288MHz at 1.8V DVDD. |
| 28 | DIN | input | Audio data serial input supporting I2S, left-justified, right-justified, and TDM/DSP formats; accepts 16-bit, 20-bit, 24-bit, and 32-bit audio data. |
| 29 | NC | unconnected | No connect; leave unconnected. |
| 30 | NC | unconnected | No connect; leave unconnected. |
| 31 | LRCK | bidirectional | Audio data word clock; input in slave mode or output in master mode; defines left/right channel timing and frame synchronization for audio interface. |
| 32 | ADR1/MISO | bidirectional | I2C slave address LSB select (ADR1) in I2C mode; SPI readback data output (MISO) or GPIO1 in SPI mode; audio format select (FMT) in hardware mode. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | Data Acquisition |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
PCM5242RHBR - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
pcm5242rhbr-etched.step/pcm5242rhbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pcm5242rhbr.step/pcm5242rhbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (129 pp, sha256
18734ea229cb2e74, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).