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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	Publish 0.1.0 · Ray	23h ago
viewers	pcm5102apw: viewers · Ray	23h ago
package.json	pcm5102apw: LCSC part number C1520792 (was published as the bare integer) · Ray	7h ago
page.json	pcm5102apw: LCSC part number C1520792 (was published as the bare integer) · Ray	7h ago
pcm5102apw-etched.glb	pcm5102apw: factory component page (tier=mfr) · Ray	23h ago
pcm5102apw-etched.step	pcm5102apw: factory component page (tier=mfr) · Ray	23h ago
pcm5102apw-hero.glb	Publish 0.1.0 · Ray	23h ago
pcm5102apw-hero.overlay.json	Publish 0.1.0 · Ray	23h ago
pcm5102apw.glb	Publish 0.1.0 · Ray	23h ago
pcm5102apw.kicad_mod	Publish 0.1.0 · Ray	23h ago
pcm5102apw.kicad_sym	Publish 0.1.0 · Ray	23h ago
pcm5102apw.lbr	Publish 0.1.0 · Ray	23h ago
pcm5102apw.step	Publish 0.1.0 · Ray	23h ago
README.md	Initial commit: component/pcm5102apw · Ray	23h ago

PCM5102APW

Texas Instruments · ADCs/DACs - Special Purpose · TSSOP-20

PCM5102APW from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CPVDD	power_in	Charge pump power supply, 3.3 V
2	CAPP	output	Charge pump flying capacitor terminal for positive rail
3	CPGND	power_in	Charge pump ground
4	CAPM	output	Charge pump flying capacitor terminal for negative rail
5	VNEG	output	Negative charge pump rail terminal for decoupling, -3.3 V
6	OUTL	output	Analog output from DAC left channel
7	OUTR	output	Analog output from DAC right channel
8	AVDD	power_in	Analog power supply, 3.3 V
9	AGND	power_in	Analog ground
10	DEMP	input	De-emphasis control for 44.1-kHz sampling rate with Failsafe LVCMOS Schmitt trigger input: Off (Low) / On (High)
11	FLT	input	Filter select with Failsafe LVCMOS Schmitt trigger input: Normal latency (Low) / Low latency (High)
12	SCK	input	System clock input with Failsafe LVCMOS Schmitt trigger input, up to 50 MHz
13	BCK	input	Audio data bit clock input with Failsafe LVCMOS Schmitt trigger input
14	DIN	input	Audio data input with Failsafe LVCMOS Schmitt trigger input
15	LRCK	input	Audio data word clock input with Failsafe LVCMOS Schmitt trigger input
16	FMT	input	Audio format selection with Failsafe LVCMOS Schmitt trigger input: I2S (Low) / Left-justified (High)
17	XSMT	input	Soft mute control with Failsafe LVCMOS Schmitt trigger input: Soft mute (Low) / Soft un-mute (High)
18	LDOO	power_in	Internal logic supply rail terminal for decoupling, or external 1.8 V supply terminal
19	DGND	power_in	Digital ground
20	DVDD	power_in	Digital power supply, 1.8 V or 3.3 V

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-20
Category	Data Acquisition
Pins	20

CAD (KiCad official)

Symbol: PCM5102APW
Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
3D model: TSSOP-20 (KiCad packages3D, STEP)
3D model files: pcm5102apw-etched.step / pcm5102apw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pcm5102apw.step / pcm5102apw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (44 pp, sha256 a522083606b8e994, retrieved 2026-10-06, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF