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Name	Last commit message	Last updated
docs	pcm2706cpjtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	2d ago
viewers	pcm2706cpjtr: viewers · Ray	9d ago
package.json	Publish 0.1.0 · Ray	9d ago
page.json	Set visibility: public · Ray	9d ago
pcm2706cpjtr-etched.fit.json	pcm2706cpjtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	2d ago
pcm2706cpjtr-etched.glb	pcm2706cpjtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	2d ago
pcm2706cpjtr-etched.step	pcm2706cpjtr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	2d ago
pcm2706cpjtr.glb	Publish 0.1.0 · Ray	9d ago
pcm2706cpjtr.kicad_mod	Publish 0.1.0 · Ray	9d ago
pcm2706cpjtr.kicad_sym	Publish 0.1.0 · Ray	9d ago
pcm2706cpjtr.lbr	Publish 0.1.0 · Ray	9d ago
pcm2706cpjtr.step	Publish 0.1.0 · Ray	9d ago
README.md	Initial commit: component/pcm2706cpjtr · Ray	9d ago

PCM2706CPJTR

Texas Instruments · ADCs/DACs - Special Purpose · TQFP-32(7x7)

PCM2706CPJTR from Texas Instruments, in a TQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PGND	power_in	Analog ground for DAC, oscillator, and PLL.
2	VCCP	power_in	Analog power supply for DAC, oscillator, and PLL; 3.3 V for self-powered applications with decoupling capacitor required.
3	HOST	input	Host detection during self-powered operation (connect to VBUS) or maximum power select during bus-powered operation (low: 100 mA, high: 500 mA); 5-V tolerant LV-TTL.
4	FUNC3	input	HID play/pause key state input when FSEL = 1 (active high) or I2S data input when FSEL = 0; LV-TTL with internal pulldown.
5	FUNC0	bidirectional	HID next-track key state input when FSEL = 1 (active high) or I2S LR clock output when FSEL = 0; LV-TTL with internal pulldown.
6	HID0/MS	input	Mute key state input for PCM2706C (active high) or MS input for PCM2707C; LV-TTL with internal pulldown.
7	HID1/MC	input	Volume-up key state input for PCM2706C (active high) or MC input for PCM2707C; LV-TTL with internal pulldown.
8	HID2/MD	input	Volume-down key state input for PCM2706C (active high) or MD input for PCM2707C; LV-TTL with internal pulldown.
9	FSEL	input	Function select (low: I2S data output, high: S/PDIF output); LV-TTL level.
10	TEST	input	Test pin; must be set high for proper operation; LV-TTL level.
11	SSPND	output	Suspend flag indicating USB suspended state (active low: low when suspended, high when operational).
12	XTI	input	Crystal oscillator input for 12 MHz ±500 ppm external clock or internal resonator; LV-TTL level.
13	XTO	output	Crystal oscillator output for external crystal connection; must be left open if external clock is supplied to XTI.
14	CK	output	Clock output for external ROM I2C interface (PCM2706C); must be left open for PCM2707C.
15	DT	bidirectional	Data input/output for external ROM I2C interface (PCM2706C); must be left open with pullup resistor for PCM2707C; LV-TTL level.
16	PSEL	input	Power source select (low: self-powered from 3.3 V, high: bus-powered from 5 V USB); LV-TTL level.
17	DOUT	output	S/PDIF output when FSEL = 1 or I2S data output when FSEL = 0.
18	FUNC2	bidirectional	HID stop key state input when FSEL = 1 (active high) or I2S system clock output when FSEL = 0; LV-TTL with internal pulldown.
19	FUNC1	bidirectional	HID previous-track key state input when FSEL = 1 (active high) or I2S bit clock output when FSEL = 0; LV-TTL with internal pulldown.
20	DGND	power_in	Digital ground.
21	VDD	power_in	Digital power supply; 3.3 V for self-powered applications with decoupling capacitor required.
22	D-	bidirectional	USB D- differential signal line (negative); LV-TTL level.
23	D+	bidirectional	USB D+ differential signal line (positive) with 1.5 kΩ ±5% pullup resistor to 3.3 V required; LV-TTL level.
24	VBUS	power_in	Connect to USB bus power (5 V) for bus-powered operation or connect to VDD for self-powered operation.
25	ZGND	power_in	Ground connection for internal voltage regulator.
26	AGNDL	power_in	Analog ground for left-channel headphone amplifier.
27	VCCL	power_in	Analog power supply for left-channel headphone amplifier; 3.3 V for self-powered applications with decoupling capacitor required.
28	VOUTL	output	DAC analog output for left-channel audio with output impedance 26 kΩ ±20% in powered-off state.
29	VOUTR	output	DAC analog output for right-channel audio with output impedance 26 kΩ ±20% in powered-off state.
30	VCCR	power_in	Analog power supply for right-channel headphone amplifier; 3.3 V for self-powered applications with decoupling capacitor required.
31	AGNDR	power_in	Analog ground for right-channel headphone amplifier.
32	VCOM	output	Common voltage for DAC output biasing (nominal VCCP/2); connect 100 μF decoupling capacitor to PGND.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TQFP-32(7x7)
Category	Data Acquisition
Pins	32

CAD (KiCad official)

Symbol: PCM2706CPJTR
Footprint: Package_QFP:TQFP-32_7x7mm_P0.8mm
3D model: TQFP-32(7x7) (KiCad packages3D, STEP)
3D model files: pcm2706cpjtr-etched.step / pcm2706cpjtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pcm2706cpjtr.step / pcm2706cpjtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (53 pp, sha256 36480dfb52585877, retrieved 2026-09-26, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF