main
Ray Publish 0.1.0 a5e2608 16d ago
{
  "slug": "pcm1793dbr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments ADCs/DACs - Special Purpose, SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "pcm1793dbr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "pcm1793dbr.kicad_sym",
    "pcm1793dbr.kicad_mod",
    "pcm1793dbr.glb",
    "pcm1793dbr.step",
    "pcm1793dbr.lbr",
    "docs/hero.png",
    "docs/pcm1793dbr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "pcm1793dbr-hero.glb",
    "pcm1793dbr-hero.overlay.json"
  ],
  "component": {
    "mpn": "PCM1793DBR",
    "manufacturer": "Texas Instruments",
    "package": "SSOP-28",
    "pin_count": 28,
    "category": "Data Acquisition",
    "subcategory": "ADCs/DACs - Special Purpose",
    "datasheet": "https://www.ti.com/cn/lit/gpn/pcm1793",
    "parts": {
      "symbol": "pcm1793dbr.kicad_sym",
      "footprint": "pcm1793dbr.kicad_mod",
      "model_3d": "pcm1793dbr-hero.glb",
      "model_3d_plain": "pcm1793dbr.glb",
      "model_3d_step": "pcm1793dbr-etched.step",
      "model_3d_step_plain": "pcm1793dbr.step",
      "lbr": "pcm1793dbr.lbr"
    },
    "distributor_links": {
      "lcsc": "C2667108",
      "digikey": "296-41376-2-ND",
      "mouser": "595-PCM1793DBR"
    },
    "distributor_check": {
      "checked_at": "2026-10-10T21:53:31Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-41376-2-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-PCM1793DBR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "LRCK",
        "type": "input",
        "description": "Left and right clock (fS) input for the audio interface, Schmitt-trigger and 5-V tolerant; it must be synchronized with the system clock, and sampling frequency is 10 kHz to 200 kHz."
      },
      {
        "number": "2",
        "name": "BCK",
        "type": "input",
        "description": "Serial audio bit clock input, Schmitt-trigger and 5-V tolerant; serial data on DATA is clocked in on its rising edge."
      },
      {
        "number": "3",
        "name": "DATA",
        "type": "input",
        "description": "Serial audio data input, Schmitt-trigger and 5-V tolerant; data is binary 2s complement, MSB first."
      },
      {
        "number": "4",
        "name": "MUTE",
        "type": "input",
        "description": "Analog output mute control, Schmitt-trigger and 5-V tolerant; when HIGH, both analog outputs move to the bipolar zero level in −0.5-dB steps at 1/fS per step."
      },
      {
        "number": "5",
        "name": "SCK",
        "type": "input",
        "description": "System clock input, Schmitt-trigger and 5-V tolerant; the device auto-detects 128, 192, 256, 384, 512 or 768 fS, with a minimum pulse cycle time of 13 ns."
      },
      {
        "number": "6",
        "name": "RST",
        "type": "input",
        "description": "External reset input, Schmitt-trigger and 5-V tolerant; a LOW pulse of at least 20 ns forces the device to its default state, followed by 1024 system clocks of initialization."
      },
      {
        "number": "7",
        "name": "VDD",
        "type": "power_in",
        "description": "Digital power supply, 3.3 V nominal with a voltage range of 3 V to 3.6 V."
      },
      {
        "number": "8",
        "name": "DGND",
        "type": "power_in",
        "description": "Digital ground for the digital section of the device."
      },
      {
        "number": "9",
        "name": "AGNDF",
        "type": "power_in",
        "description": "Analog ground for the DACFF section."
      },
      {
        "number": "10",
        "name": "VCCR",
        "type": "power_in",
        "description": "Analog power supply for the R-channel I/V stage, 5 V nominal with a voltage range of 4.5 V to 5.5 V."
      },
      {
        "number": "11",
        "name": "AGNDR",
        "type": "power_in",
        "description": "Analog ground for the R-channel I/V stage."
      },
      {
        "number": "12",
        "name": "VOUTR−",
        "type": "output",
        "description": "R-channel analog voltage output (negative leg); forms the differential output with VOUTR+, 3.2 V p-p at full scale (0 dB)."
      },
      {
        "number": "13",
        "name": "VOUTR+",
        "type": "output",
        "description": "R-channel analog voltage output (positive leg); forms the differential output with VOUTR−, 3.2 V p-p at full scale (0 dB)."
      },
      {
        "number": "14",
        "name": "VCOM",
        "type": "passive",
        "description": "Internal bias decoupling pin, to be decoupled externally."
      },
      {
        "number": "15",
        "name": "VCCC",
        "type": "power_in",
        "description": "Analog power supply for the internal bias and current DAC, 5 V nominal with a voltage range of 4.5 V to 5.5 V."
      },
      {
        "number": "16",
        "name": "AGNDC",
        "type": "power_in",
        "description": "Analog ground for the internal bias and current DAC."
      },
      {
        "number": "17",
        "name": "VOUTL+",
        "type": "output",
        "description": "L-channel analog voltage output (positive leg); forms the differential output with VOUTL−, 3.2 V p-p at full scale (0 dB)."
      },
      {
        "number": "18",
        "name": "VOUTL−",
        "type": "output",
        "description": "L-channel analog voltage output (negative leg); forms the differential output with VOUTL+, 3.2 V p-p at full scale (0 dB)."
      },
      {
        "number": "19",
        "name": "AGNDL",
        "type": "power_in",
        "description": "Analog ground for the L-channel I/V stage."
      },
      {
        "number": "20",
        "name": "VCCL",
        "type": "power_in",
        "description": "Analog power supply for the L-channel I/V stage, 5 V nominal with a voltage range of 4.5 V to 5.5 V."
      },
      {
        "number": "21",
        "name": "VCCF",
        "type": "power_in",
        "description": "Analog power supply for the DACFF section, 5 V nominal with a voltage range of 4.5 V to 5.5 V."
      },
      {
        "number": "22",
        "name": "ZEROR",
        "type": "output",
        "description": "Zero flag output for the R channel; goes HIGH when the R-channel input data is continuously zero for 1024 fS."
      },
      {
        "number": "23",
        "name": "ZEROL",
        "type": "output",
        "description": "Zero flag output for the L channel; goes HIGH when the L-channel input data is continuously zero for 1024 fS."
      },
      {
        "number": "24",
        "name": "DEMP0",
        "type": "input",
        "description": "De-emphasis control bit 0, Schmitt-trigger and 5-V tolerant; together with DEMP1 selects de-emphasis off, 48 kHz, 44.1 kHz or 32 kHz."
      },
      {
        "number": "25",
        "name": "DEMP1",
        "type": "input",
        "description": "De-emphasis control bit 1, Schmitt-trigger and 5-V tolerant; together with DEMP0 selects de-emphasis off, 48 kHz, 44.1 kHz or 32 kHz."
      },
      {
        "number": "26",
        "name": "FMT0",
        "type": "input",
        "description": "Audio data format select bit 0, Schmitt-trigger and 5-V tolerant; together with FMT1 and FMT2 selects the standard, left-justified or I2S format and bit length."
      },
      {
        "number": "27",
        "name": "FMT1",
        "type": "input",
        "description": "Audio data format select bit 1, Schmitt-trigger and 5-V tolerant; together with FMT0 and FMT2 selects the standard, left-justified or I2S format and bit length."
      },
      {
        "number": "28",
        "name": "FMT2",
        "type": "input",
        "description": "Audio data format select bit 2, Schmitt-trigger and 5-V tolerant; together with FMT0 and FMT1 selects the standard, left-justified or I2S format and bit length."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 30,
        "cost_usd": 0.1054,
        "at": "2026-10-10T21:53:13"
      },
      "datasheet": {
        "url": "https://www.ti.com/cn/lit/gpn/pcm1793",
        "pages": 30,
        "sha256": "a564e671a9b59486",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 28,
        "described": 28,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "pcm1793dbr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.8,
          10.2,
          2.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "7aa76979ae41da44bded1ed74115012868f2f3f5a757faf32bb9df4f92c1e313",
        "checked": "2026-10-10",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "pcm1793dbr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          7.8,
          10.2,
          2.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "73b95a8517c11cc2a39f17474a28b947437fb01f0740667bd2ce82d1252746ca",
        "checked": "2026-10-10",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}