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PCM1773PWR

Texas Instruments · ADCs/DACs - Special Purpose · TSSOP-16

PCM1773PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 LRCK bidirectional Left and right clock that determines which channel is on DATA; its frequency must equal the audio sampling rate, it is an input from an external device in slave mode and is generated as an output in master mode.
2 DATA input Serial audio data input.
3 BCK bidirectional Serial bit clock that clocks the individual bits of DATA; it is an input from an external device in slave mode and is generated as an output in master mode.
4 PD input Reset input; when low, the device is powered down and the mode control registers are reset to default settings.
5 AGND1 power_in Analog ground that is the return for VCC1.
6 AGND2 power_in Analog ground that is the return for VCC2.
7 VCOM passive Decoupling capacitor connection; an external 10-µF capacitor from this terminal to analog ground is required for noise filtering, and the nominal voltage here is 0.5 VCC2.
8 VOUTR output R-channel analog signal output of the lineout amplifiers.
9 VOUTL output L-channel analog signal output of the lineout amplifiers.
10 AIN input Monaural analog signal mixer input that can be mixed with the output of the L- and R-channel DACs; the line input voltage range is 0.584 VCC2 Vp-p.
11 VCC2 power_in Analog power supply for the lineout amplifier circuits; the voltage must be the same as VCC1, with an operating supply range of 1.6 V to 3.6 V.
12 VCC1 power_in Power supply for all analog circuits except the lineout amplifier; the operating supply range is 1.6 V to 3.6 V.
13 DEMP input Hardware control for 44.1-kHz digital de-emphasis, as listed in the PCM1773 hardware-control feature set; the pin's voltage limits are not stated in the provided text.
14 AMIX input Hardware control for monaural analog-in mixing, as listed in the PCM1773 hardware-control feature set; the pin's voltage limits are not stated in the provided text.
15 FMT input Hardware control selecting the audio data format, which for PCM1773 is Left-Justified or I2S; the pin's voltage limits are not stated in the provided text.
16 SCKI input System clock input supporting 128 fS, 192 fS, 256 fS or 384 fS system clock frequencies.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Data Acquisition
Pins 16

CAD (KiCad official)

  • Symbol: PCM1773PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: pcm1773pwr-etched.step / pcm1773pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pcm1773pwr.step / pcm1773pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 379ef74e4fdfa5de, retrieved 2026-10-11, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF