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PCF8575RGER

Public Made by Adom

by adom

Texas Instruments I/O Expanders, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs pcf8575rger: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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pcf8575rger-etched.glb pcf8575rger: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
pcf8575rger-etched.step pcf8575rger: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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README.md Initial commit: component/pcf8575rger · Ray 5d ago

PCF8575RGER

Texas Instruments · I/O Expanders · VQFN-24-EP(4x4)

PCF8575RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P00 bidirectional P-port input/output. Push-pull design structure.
2 P01 bidirectional P-port input/output. Push-pull design structure.
3 P02 bidirectional P-port input/output. Push-pull design structure.
4 P03 bidirectional P-port input/output. Push-pull design structure.
5 P04 bidirectional P-port input/output. Push-pull design structure.
6 P05 bidirectional P-port input/output. Push-pull design structure.
7 P06 bidirectional P-port input/output. Push-pull design structure.
8 P07 bidirectional P-port input/output. Push-pull design structure.
9 GND power_in Ground
10 P10 bidirectional P-port input/output. Push-pull design structure.
11 P11 bidirectional P-port input/output. Push-pull design structure.
12 P12 bidirectional P-port input/output. Push-pull design structure.
13 P13 bidirectional P-port input/output. Push-pull design structure.
14 P14 bidirectional P-port input/output. Push-pull design structure.
15 P15 bidirectional P-port input/output. Push-pull design structure.
16 P16 bidirectional P-port input/output. Push-pull design structure.
17 P17 bidirectional P-port input/output. Push-pull design structure.
18 A0 input Address input 0. Connect directly to VCC or ground. Pull-up resistors are not needed.
19 SCL input Serial clock line. Connect to VCC through a pull-up resistor
20 SDA bidirectional Serial data line. Connect to VCC through a pull-up resistor.
21 VCC power_out Supply voltage
22 INT output Interrupt output. Connect to VCC through a pull-up resistor.
23 A1 input Address input 1. Connect directly to VCC or ground. Pull-up resistors are not needed.
24 A2 input Address input 2. Connect directly to VCC or ground. Pull-up resistors are not needed.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x4)
Category Interface
Pins 25

CAD (KiCad official)

  • Symbol: PCF8575RGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: pcf8575rger-etched.step / pcf8575rger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pcf8575rger.step / pcf8575rger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (44 pp, sha256 259c563b4e0ee0da, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF