component
PCF8563N
Public Made by Adomby adom
HGSEMI Real Time Clocks, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPCF8563N
HGSEMI · Real Time Clocks · DIP-8
PCF8563N from HGSEMI, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OSCI | input | Oscillator input for the 32.768kHz crystal, which can also take an external trimming capacitor Ctrim (5-25pF); the pin input voltage is limited to -0.5V to VDD+0.5V. |
| 2 | OSCO | output | Oscillator output for the 32.768kHz crystal, with an internal load capacitance COSCO of 15-35pF (25pF typical). |
| 3 | INT | output | Open-drain interrupt output for alarm and timer interrupts, with a low-level output current of at least -1mA at VOL=0.4V and VDD=5.0V. |
| 4 | VSS | power_in | Ground reference pin (0V) for the device. |
| 5 | SDA | bidirectional | Open-drain serial data I/O line of the I2C bus, requiring a pull-up resistor to the positive supply; it sinks at least 3mA at VOL=0.4V and VDD=5.0V. |
| 6 | SCL | input | Serial clock input of the I2C bus, operating up to 400kHz and requiring a pull-up resistor to the positive supply. |
| 7 | CLKOUT | output | Open-drain programmable clock output that can be set to 32.768kHz (default), 1024Hz, 32Hz or 1Hz, and is high-impedance when disabled; its low-level output current is at least -1mA at VOL=0.4V and VDD=5.0V. |
| 8 | VDD | power_in | Positive supply pin, specified from 1.2V to 5.5V (1.8V to 5.5V for valid I2C bus operation), with absolute maximum rating of -0.5V to +6.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | DIP-8 |
| Category | Clock/Timing |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute maximum) | VDD | -0.5 | 6.5 | V | 3 | ||
| Supply current (absolute maximum) | IDD | -50 | 50 | mA | 3 | ||
| SCL and SDA input voltage (absolute maximum) | VI | -0.5 | 6.5 | V | 3 | ||
| OSCI pin input voltage (absolute maximum) | -0.5 | V | Printed maximum is VDD+0.5 (symbolic, not numeric) | 3 | |||
| CLKOUT and INT pin output voltage (absolute maximum) | VO | -0.5 | 6.5 | V | 3 | ||
| DC input current, all inputs (absolute maximum) | II | -10 | 10 | mA | 3 | ||
| DC output current, all outputs (absolute maximum) | IO | -10 | 10 | mA | 3 | ||
| Total power dissipation (absolute maximum) | P | 300 | mW | 3 | |||
| Operating temperature (absolute maximum) | TA | -40 | 85 | °C | 3 | ||
| Storage temperature (absolute maximum) | TS | -55 | 125 | °C | 3 | ||
| Pin temperature, soldering (absolute maximum) | TLEAD | 260 | °C | Soldering, 10 s | 3 | ||
| Supply voltage, I2C bus valid | VDD | 1.8 | 5.5 | V | I2C bus valid, f=400kHz | 4 | |
| Supply voltage, I2C bus failure | VDD | 1.2 | 5.5 | V | I2C bus failure, TA=25°C | 4 | |
| Supply voltage for reliable clock/calendar data | Vlow | 5.5 | V | TA=25°C | 4 | ||
| Operating current 1 (CLKOUT enabled) | IDD1 | 800 | µA | CLKOUT enabled (FE=1), fSCL=400kHz | 4 | ||
| Operating current 1 (CLKOUT enabled) | IDD1 | 200 | µA | CLKOUT enabled (FE=1), fSCL=100kHz | 4 | ||
| Operating current 2 (CLKOUT disabled) | IDD2 | 550 | 800 | nA | CLKOUT disabled (FE=0), fSCL=0Hz, TA=25°C, VDD=5.0V | 4 | |
| Operating current 2 (CLKOUT disabled) | IDD2 | 250 | 650 | nA | CLKOUT disabled (FE=0), fSCL=0Hz, TA=25°C, VDD=3.0V | 4 | |
| Operating current 2 (CLKOUT disabled) | IDD2 | 200 | 500 | nA | CLKOUT disabled (FE=0), fSCL=0Hz, TA=25°C, VDD=2.0V | 4 | |
| Operating current 2 (CLKOUT disabled) | IDD2 | 700 | 950 | nA | CLKOUT disabled (FE=0), fSCL=0Hz, TA=-40 to +85°C, VDD=5.0V | 4 | |
| Operating current 2 (CLKOUT disabled) | IDD2 | 600 | 900 | nA | CLKOUT disabled (FE=0), fSCL=0Hz, TA=-40 to +85°C, VDD=3.0V | 4 | |
| Operating current 2 (CLKOUT disabled) | IDD2 | 550 | 850 | nA | CLKOUT disabled (FE=0), fSCL=0Hz, TA=-40 to +85°C, VDD=2.0V | 4 | |
| Operating current 3 (CLKOUT 32.768kHz) | IDD3 | 900 | 1600 | nA | CLKOUT=32.768kHz, fSCL=0Hz, TA=25°C, VDD=5.0V | 4 | |
| Operating current 3 (CLKOUT 32.768kHz) | IDD3 | 650 | 1000 | nA | CLKOUT=32.768kHz, fSCL=0Hz, TA=25°C, VDD=3.0V | 4 | |
| Operating current 3 (CLKOUT 32.768kHz) | IDD3 | 525 | 800 | nA | CLKOUT=32.768kHz, fSCL=0Hz, TA=25°C, VDD=2.0V | 4 | |
| Operating current 3 (CLKOUT 32.768kHz) | IDD3 | 1200 | 1800 | nA | CLKOUT=32.768kHz, fSCL=0Hz, TA=-40 to +85°C, VDD=5.0V | 4 | |
| Operating current 3 (CLKOUT 32.768kHz) | IDD3 | 950 | 1200 | nA | CLKOUT=32.768kHz, fSCL=0Hz, TA=-40 to +85°C, VDD=3.0V | 4 | |
| Operating current 3 (CLKOUT 32.768kHz) | IDD3 | 750 | 900 | nA | CLKOUT=32.768kHz, fSCL=0Hz, TA=-40 to +85°C, VDD=2.0V | 4 | |
| Input leakage current | ILI | -1 | 0 | 1 | µA | VI=VDD or VSS | 4 |
| Input capacitance | CI | 7 | pF | Sample-tested (note 3) | 4 | ||
| SDA low-level output current | IOLS | -3 | mA | VOL=0.4V, VDD=5.0V | 4 | ||
| INT low-level output current | IOLI | -1 | mA | VOL=0.4V, VDD=5.0V | 4 | ||
| CLKOUT low-level output current | IOLC | -1 | mA | VOL=0.4V, VDD=5.0V | 4 | ||
| CLKOUT high-level output current | IOHC | 1 | mA | VOL=4.6V (as printed), VDD=5.0V | 4 | ||
| Output leakage current | ILO | -1 | 0 | 1 | µA | VO=VDD or VSS | 4 |
| OSCO internal load capacitance | COSCO | 15 | 25 | 35 | pF | OSCO internal capacitance | 5 |
| Series resistance (crystal) | RS | 100 | kΩ | 5 | |||
| Parallel load capacitance (crystal) | CL | 7 | 12.5 | pF | Parallel relation (note 1) | 5 | |
| Single-side trimming capacitance | Ctrim | 5 | 25 | pF | External, on OSCI | 5 | |
| Equivalent series resistance (crystal parameter table) | ESR | 50 | 100 | KΩ | Crystal parameter table, f=32.768kHz | 17 | |
| SCL clock frequency | fSCL | 400 | kHz | 5 | |||
| Start condition hold time | tHDSTA | 0.6 | µs | 5 | |||
| Repeated start condition setup time | tSUSTA | 0.6 | µs | 5 | |||
| SCL low period | tLOW | 1.3 | µs | 5 | |||
| SCL high period | tHIGH | 0.6 | µs | 5 | |||
| SCL and SDA rise time | tr | 0.3 | µs | 5 | |||
| SCL and SDA fall time | tf | 0.3 | µs | 5 | |||
| Bus load capacitance | Cb | 400 | pF | 5 | |||
| Data setup time | tSUDAT | 100 | ns | 5 | |||
| Data hold time | tHDDAT | 0 | ns | 5 | |||
| Stop condition setup time | tSUSTO | 0.6 | µs | 5 | |||
| Acceptable bus spike width | tSW | 50 | ns | 5 |
CAD (KiCad official)
- Symbol:
PCF8563N - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
pcf8563n-etched.step/pcf8563n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pcf8563n.step/pcf8563n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (21 pp, sha256
52838857838b981c, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).