component
PCA9654EDTR2G
Public Made by Adomby adom
onsemi I/O Expanders, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPCA9654EDTR2G
onsemi · I/O Expanders · TSSOP-16
PCA9654EDTR2G from onsemi, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | AD0 | input | Address input 0 selects one of 64 slave addresses together with AD1 and AD2; no internal pull-up resistor is incorporated on AD0. |
| 2 | AD1 | input | Address input 1 selects one of 64 slave addresses together with AD0 and AD2; no internal pull-up resistor is incorporated on AD1. |
| 3 | AD2 | input | Address input 2 selects one of 64 slave addresses together with AD0 and AD1; no internal pull-up resistor is incorporated on AD2. |
| 4 | IO0 | bidirectional | General-purpose I/O 0, configurable as input (high-impedance with weak 100 kΩ pull-up to VDD) or output; may be raised to a maximum of 5.5 V when configured as input, and each bit is limited to 25 mA sink. |
| 5 | IO1 | bidirectional | General-purpose I/O 1, configurable as input (high-impedance with weak 100 kΩ pull-up to VDD) or output; may be raised to a maximum of 5.5 V when configured as input, and each bit is limited to 25 mA sink. |
| 6 | IO2 | bidirectional | General-purpose I/O 2, configurable as input (high-impedance with weak 100 kΩ pull-up to VDD) or output; may be raised to a maximum of 5.5 V when configured as input, and each bit is limited to 25 mA sink. |
| 7 | IO3 | bidirectional | General-purpose I/O 3, configurable as input (high-impedance with weak 100 kΩ pull-up to VDD) or output; may be raised to a maximum of 5.5 V when configured as input, and each bit is limited to 25 mA sink. |
| 8 | VSS | power_in | Supply ground. |
| 9 | IO4 | bidirectional | General-purpose I/O 4, configurable as input (high-impedance with weak 100 kΩ pull-up to VDD) or output; may be raised to a maximum of 5.5 V when configured as input, and each bit is limited to 25 mA sink. |
| 10 | IO5 | bidirectional | General-purpose I/O 5, configurable as input (high-impedance with weak 100 kΩ pull-up to VDD) or output; may be raised to a maximum of 5.5 V when configured as input, and each bit is limited to 25 mA sink. |
| 11 | IO6 | bidirectional | General-purpose I/O 6, configurable as input (high-impedance with weak 100 kΩ pull-up to VDD) or output; may be raised to a maximum of 5.5 V when configured as input, and each bit is limited to 25 mA sink. |
| 12 | IO7 | bidirectional | General-purpose I/O 7, configurable as input (high-impedance with weak 100 kΩ pull-up to VDD) or output; may be raised to a maximum of 5.5 V when configured as input, and each bit is limited to 25 mA sink. |
| 13 | INT | output | Active-LOW open-drain interrupt output, activated when any input state differs from its corresponding input port register state; sinks 6 mA at VOL = 0.4 V. |
| 14 | SCL | input | I2C-bus serial clock line, supporting Standard Mode (100 kHz), Fast Mode (400 kHz) and Fast Mode+ (1 MHz) and requiring an external pull-up to a positive supply. |
| 15 | SDA | bidirectional | I2C-bus serial data line, open-drain with 30 mA SDA sink capability, requiring an external pull-up to a positive supply. |
| 16 | VDD | power_in | Supply voltage, operating range 1.65 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-16 |
| Category | Interface ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage (recommended) | VDD | 1.65 | 5.5 | V | 4 | ||
| Switch Input / Output Voltage | VI/O | 0 | 5.5 | V | 4 | ||
| Operating Free-Air Temperature | TA | -55 | 125 | °C | 4 | ||
| DC Supply Voltage (absolute max) | VDD | -0.5 | 7 | V | 4 | ||
| Input / Output Pin Voltage | VI/O | -0.5 | 7 | V | 4 | ||
| Input Current | II | 20 | mA | 4 | |||
| Output Current | IO | 50 | mA | 4 | |||
| DC Supply Current | IDD | 100 | mA | 4 | |||
| DC Ground Current | IGND | 200 | mA | 4 | |||
| Total Power Dissipation | PTOT | 400 | mW | 4 | |||
| Power Dissipation per Output | POUT | 100 | mW | 4 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 4 | ||
| Lead Temperature | TL | 260 | °C | 1 mm from case for 10 seconds | 4 | ||
| Junction Temperature Under Bias | TJ | 150 | °C | Under bias | 4 | ||
| Power Dissipation in Still Air | PD | 190 | mW | Still air at 85°C | 4 | ||
| ESD Human Body Model | VESD | 4000 | V | Human Body Model; printed > 4000 V | 4 | ||
| ESD Machine Model | VESD | 400 | V | Machine Model; printed > 400 V | 4 | ||
| Supply Current, operating | IDD | 250 | 500 | µA | Operating mode; no load; VI = VDD or 0 V; fSCL = 1 MHz | 5 | |
| Supply Current, operating | IDD | 104 | 175 | µA | VI = VDD or 0 V; fSCL = 100 kHz | 5 | |
| Standby Current | ISTB | 550 | 700 | µA | Standby mode; no load; VI = 0 V; fSCL = 0 Hz; I/O = inputs | 5 | |
| Standby Current | ISTB | 0.25 | 1 | µA | VI = VDD; fSCL = 0 Hz; I/O = inputs | 5 | |
| Low-Level Output Current (SCL, SDA) | IOL | 10 | mA | VOL = 0.4 V; VDD < 2.3 V | 5 | ||
| Low-Level Output Current (SCL, SDA) | IOL | 20 | mA | VOL = 0.4 V; VDD ≥ 2.3 V | 5 | ||
| Leakage Current (SCL, SDA) | IL | 1 | µA | VI = VDD or GND | 5 | ||
| High-Level Input Voltage (I/O) | VIH | 2 | V | 2.3 V ≤ VCC ≤ 5.5 V | 5 | ||
| Low-Level Input Voltage (I/O) | VIL | 0.8 | V | 2.3 V ≤ VCC ≤ 5.5 V | 5 | ||
| Low-Level Output Current (I/O) | IOL | 8 | 13 | mA | VOL = 0.5 V; VDD = 1.65 V | 5 | |
| Low-Level Output Current (I/O) | IOL | 12 | 22 | mA | VOL = 0.5 V; VDD = 2.3 V | 5 | |
| Low-Level Output Current (I/O) | IOL | 17 | 28 | mA | VOL = 0.5 V; VDD = 3.0 V | 5 | |
| Low-Level Output Current (I/O) | IOL | 25 | 37 | mA | VOL = 0.5 V; VDD = 4.5 V | 5 | |
| Total Low-Level Output Current | IOL(tot) | 200 | mA | VOL = 0.5 V; VDD = 4.5 V | 5 | ||
| High-Level Output Voltage | VOH | 1.2 | V | IOH = −3 mA; VDD = 1.65 V | 5 | ||
| High-Level Output Voltage | VOH | 1.1 | V | IOH = −4 mA; VDD = 1.65 V | 5 | ||
| High-Level Output Voltage | VOH | 1.8 | V | IOH = −8 mA; VDD = 2.3 V | 5 | ||
| High-Level Output Voltage | VOH | 1.7 | V | IOH = −10 mA; VDD = 2.3 V | 5 | ||
| High-Level Output Voltage | VOH | 2.6 | V | IOH = −8 mA; VDD = 3.0 V | 5 | ||
| High-Level Output Voltage | VOH | 2.5 | V | IOH = −10 mA; VDD = 3.0 V | 5 | ||
| High-Level Output Voltage | VOH | 4.1 | V | IOH = −8 mA; VDD = 4.5 V | 5 | ||
| High-Level Output Voltage | VOH | 4 | V | IOH = −10 mA; VDD = 4.5 V | 5 | ||
| Input Leakage Current (high) | ILH | 1 | µA | VDD = 5.5 V; VI = VDD | 5 | ||
| Input Leakage Current (low) | ILL | -100 | µA | VDD = 5.5 V; VI = GND | 5 | ||
| Low-Level Output Current (INT) | IOL | 6 | mA | VOL = 0.4 V | 5 | ||
| High-Level Input Voltage (AD0-AD2) | VIH | 2 | V | 2.3 V ≤ VCC ≤ 5.5 V | 5 | ||
| Low-Level Input Voltage (AD0-AD2) | VIL | 0.8 | V | 2.3 V ≤ VCC ≤ 5.5 V | 5 | ||
| Leakage Current (AD0-AD2) | IL | 1 | µA | VI = VDD or GND | 5 | ||
| SCL Clock Frequency (Standard Mode) | fSCL | 0 | 0.1 | MHz | Standard Mode | 6 | |
| SCL Clock Frequency (Fast Mode) | fSCL | 0 | 0.4 | MHz | Fast Mode | 6 | |
| SCL Clock Frequency (Fast Mode +) | fSCL | 0 | 1 | MHz | Fast Mode + | 6 | |
| Bus-Free Time between STOP and START | tBUF | 4.7 | µs | Standard Mode | 6 | ||
| Bus-Free Time between STOP and START | tBUF | 1.3 | µs | Fast Mode | 6 | ||
| Bus-Free Time between STOP and START | tBUF | 0.5 | µs | Fast Mode + | 6 | ||
| Data Setup Time | tSU:DAT | 250 | ns | Standard Mode | 6 | ||
| Data Setup Time | tSU:DAT | 100 | ns | Fast Mode | 6 | ||
| Data Setup Time | tSU:DAT | 50 | ns | Fast Mode + | 6 | ||
| Data Input Setup Time | tSU(D) | 100 | ns | CL ≤ 100 pF | 6 | ||
| Data Output Valid Time | tV(Q) | 350 | ns | CL ≤ 100 pF | 6 | ||
| Data Input Hold Time | tH(D) | 1 | µs | CL ≤ 100 pF | 6 | ||
| Data Valid Time (interrupt) | tV(INT_N) | 4 | µs | CL ≤ 100 pF | 6 | ||
| Power-On Reset Voltage | VPOR | 1.5 | V | 5 | |||
| Thermal Resistance, junction to ambient (TSSOP-16) | θJA | 124 | °C/W | Minimum pad spacing on FR4; 10 mm x 1 inch 2 oz copper trace; no air flow (Note 1) | 4 |
CAD (KiCad official)
- Symbol:
PCA9654EDTR2G - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
pca9654edtr2g-etched.step/pca9654edtr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pca9654edtr2g.step/pca9654edtr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (22 pp, sha256
87e488f9fe8a48bf, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).