component
PCA9535EDTR2G
Public Made by Adomby adom
onsemi I/O Expanders, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
PCA9535EDTR2G
onsemi · I/O Expanders · TSSOP-24
PCA9535EDTR2G from onsemi, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INT | output | Active-LOW open-drain interrupt output, activated when any input state differs from its input port register state. |
| 2 | AD1 | input | Address input 1, used with AD0 and AD2 to set the I2C-bus slave address. |
| 3 | AD2 | input | Address input 2, used with AD0 and AD1 to set the I2C-bus slave address. |
| 4 | IO0_0 | bidirectional | Port 0 I/O 0, defaults to input at power-on and is 5.5 V tolerant. |
| 5 | IO0_1 | bidirectional | Port 0 I/O 1, defaults to input at power-on and is 5.5 V tolerant. |
| 6 | IO0_2 | bidirectional | Port 0 I/O 2, defaults to input at power-on and is 5.5 V tolerant. |
| 7 | IO0_3 | bidirectional | Port 0 I/O 3, defaults to input at power-on and is 5.5 V tolerant. |
| 8 | IO0_4 | bidirectional | Port 0 I/O 4, defaults to input at power-on and is 5.5 V tolerant. |
| 9 | IO0_5 | bidirectional | Port 0 I/O 5, defaults to input at power-on and is 5.5 V tolerant. |
| 10 | IO0_6 | bidirectional | Port 0 I/O 6, defaults to input at power-on and is 5.5 V tolerant. |
| 11 | IO0_7 | bidirectional | Port 0 I/O 7, defaults to input at power-on and is 5.5 V tolerant. |
| 12 | VSS | power_in | Supply ground. |
| 13 | IO1_0 | bidirectional | Port 1 I/O 0, defaults to input at power-on and is 5.5 V tolerant. |
| 14 | IO1_1 | bidirectional | Port 1 I/O 1, defaults to input at power-on and is 5.5 V tolerant. |
| 15 | IO1_2 | bidirectional | Port 1 I/O 2, defaults to input at power-on and is 5.5 V tolerant. |
| 16 | IO1_3 | bidirectional | Port 1 I/O 3, defaults to input at power-on and is 5.5 V tolerant. |
| 17 | IO1_4 | bidirectional | Port 1 I/O 4, defaults to input at power-on and is 5.5 V tolerant. |
| 18 | IO1_5 | bidirectional | Port 1 I/O 5, defaults to input at power-on and is 5.5 V tolerant. |
| 19 | IO1_6 | bidirectional | Port 1 I/O 6, defaults to input at power-on and is 5.5 V tolerant. |
| 20 | IO1_7 | bidirectional | Port 1 I/O 7, defaults to input at power-on and is 5.5 V tolerant. |
| 21 | AD0 | input | Address input 0, used with AD1 and AD2 to set the I2C-bus slave address. |
| 22 | SCL | input | I2C serial clock line input supporting 100 kHz, 400 kHz and 1 MHz clock frequencies. |
| 23 | SDA | bidirectional | I2C serial data line with 30 mA sink capability. |
| 24 | VDD | power_in | Supply voltage, 1.65 V to 5.5 V operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-24 |
| Category | Interface ICs |
| Pins | 24 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Standby Current | ISTB | 39 | 100 | µA | Standby mode; no load; VI = 0 V; fSCL = 0 Hz; I/O = inputs | 5 | |
| Power-On Reset Voltage | VPOR | 1.5 | 1.65 | V | 5 | ||
| SDA Low-Level Output Current | IOL | 10 | mA | VOL = 0.4 V; VDD < 2.3 V | 5 | ||
| SDA Low-Level Output Current | IOL | 20 | mA | VOL = 0.4 V; VDD ≥ 2.3 V | 5 | ||
| SCL/SDA Leakage Current | IL | 1 | µA | VI = VDD or 0 V | 5 | ||
| SCL/SDA Input Capacitance | CI | 4.6 | 6 | pF | VI = 0 V | 5 | |
| I/O Low-Level Output Current | IOL | 8 | 20 | mA | VOL = 0.5 V; VDD = 1.65 V | 5 | |
| I/O Low-Level Output Current | IOL | 12 | 28 | mA | VOL = 0.5 V; VDD = 2.3 V | 5 | |
| I/O Low-Level Output Current | IOL | 17 | 35 | mA | VOL = 0.5 V; VDD = 3.0 V | 5 | |
| I/O Low-Level Output Current | IOL | 25 | 42 | mA | VOL = 0.5 V; VDD = 4.5 V | 5 | |
| Total Low-Level Output Current | IOL(tot) | 400 | mA | VOL = 0.5 V; VDD = 4.5 V | 5 | ||
| High-Level Output Voltage | VOH | 1.2 | V | IOH = -3 mA; VDD = 1.65 V | 5 | ||
| High-Level Output Voltage | VOH | 1.1 | V | IOH = -4 mA; VDD = 1.65 V | 5 | ||
| High-Level Output Voltage | VOH | 1.8 | V | IOH = -8 mA; VDD = 2.3 V | 5 | ||
| High-Level Output Voltage | VOH | 1.7 | V | IOH = -10 mA; VDD = 2.3 V | 5 | ||
| High-Level Output Voltage | VOH | 2.6 | V | IOH = -8 mA; VDD = 3.0 V | 5 | ||
| High-Level Output Voltage | VOH | 2.5 | V | IOH = -10 mA; VDD = 3.0 V | 5 | ||
| High-Level Output Voltage | VOH | 4.1 | V | IOH = -8 mA; VDD = 4.5 V | 5 | ||
| High-Level Output Voltage | VOH | 4 | V | IOH = -10 mA; VDD = 4.5 V | 5 | ||
| I/O Input Leakage Current | IL | 1 | µA | VDD = 5.5 V; VI = VDD or 0 V | 5 | ||
| I/O Capacitance | CI/O | 3.7 | 5 | pF | 5 | ||
| INT Low-Level Output Current | IOL | 6 | mA | VOL = 0.4 V | 5 | ||
| INT Output Capacitance | CO | 2.1 | 5 | pF | 5 | ||
| AD Pins Leakage Current | IL | 1 | µA | VI = VDD or 0 V | 5 | ||
| AD Pins Input Capacitance | CI | 2.4 | 5 | pF | 5 | ||
| Positive DC Supply Voltage | VDD | 1.65 | 5.5 | V | 4 | ||
| Switch Input / Output Voltage | VI/O | 0 | 5.5 | V | 4 | ||
| Operating Free-Air Temperature | TA | -55 | 125 | °C | 4 | ||
| DC Supply Voltage | VDD | -0.5 | 7 | V | 4 | ||
| Input / Output Pin Voltage | VI/O | -0.5 | 7 | V | 4 | ||
| Input Current | II | 20 | mA | 4 | |||
| Output Current | IO | 50 | mA | 4 | |||
| DC Supply Current | IDD | 100 | mA | 4 | |||
| DC Ground Current | IGND | 600 | mA | 4 | |||
| Total Power Dissipation | PTOT | 600 | mW | 4 | |||
| Power Dissipation per Output | POUT | 200 | mW | 4 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 4 | ||
| Lead Temperature | TL | 260 | °C | 1 mm from case for 10 seconds | 4 | ||
| Junction Temperature Under Bias | TJ | 150 | °C | 4 | |||
| Thermal Resistance TSSOP-24 | θJA | 91 | °C/W | TSSOP-24; FR4 board, 10 mm-by-1 inch 2 oz copper trace, no air flow | 4 | ||
| SCL Clock Frequency, Standard Mode | fSCL | 0 | 0.1 | MHz | Standard Mode | 6 | |
| SCL Clock Frequency, Fast Mode | fSCL | 0 | 0.4 | MHz | Fast Mode | 6 | |
| SCL Clock Frequency, Fast Mode + | fSCL | 0 | 1 | MHz | Fast Mode + | 6 | |
| Bus-Free Time STOP to START | tBUF | 0.5 | µs | Fast Mode + | 6 | ||
| Data Output Valid Time | tV(Q) | 200 | ns | VDD = 4.5 V to 5.5 V; CL ≤ 100 pF | 6 | ||
| Data Output Valid Time | tV(Q) | 350 | ns | VDD = 2.3 V to 4.5 V; CL ≤ 100 pF | 6 | ||
| Data Output Valid Time | tV(Q) | 550 | ns | VDD = 1.65 V to 2.3 V; CL ≤ 100 pF | 6 | ||
| Data Input Setup Time | tSU(D) | 100 | ns | CL ≤ 100 pF | 6 | ||
| Data Input Hold Time | tH(D) | 1 | µs | CL ≤ 100 pF | 6 | ||
| Interrupt Data Valid Time | tV(INT_N) | 4 | µs | CL ≤ 100 pF | 6 | ||
| Interrupt Reset Delay Time | tRST(INT_N) | 4 | µs | CL ≤ 100 pF | 6 |
CAD (KiCad official)
- Symbol:
PCA9535EDTR2G - Footprint:
Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm - 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files:
pca9535edtr2g-etched.step/pca9535edtr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pca9535edtr2g.step/pca9535edtr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (22 pp, sha256
5f24973b534cbc15, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PCA9535EDTR2G
**onsemi** · I/O Expanders · TSSOP-24
PCA9535EDTR2G from onsemi, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | INT | output | Active-LOW open-drain interrupt output, activated when any input state differs from its input port register state. |
| 2 | AD1 | input | Address input 1, used with AD0 and AD2 to set the I2C-bus slave address. |
| 3 | AD2 | input | Address input 2, used with AD0 and AD1 to set the I2C-bus slave address. |
| 4 | IO0_0 | bidirectional | Port 0 I/O 0, defaults to input at power-on and is 5.5 V tolerant. |
| 5 | IO0_1 | bidirectional | Port 0 I/O 1, defaults to input at power-on and is 5.5 V tolerant. |
| 6 | IO0_2 | bidirectional | Port 0 I/O 2, defaults to input at power-on and is 5.5 V tolerant. |
| 7 | IO0_3 | bidirectional | Port 0 I/O 3, defaults to input at power-on and is 5.5 V tolerant. |
| 8 | IO0_4 | bidirectional | Port 0 I/O 4, defaults to input at power-on and is 5.5 V tolerant. |
| 9 | IO0_5 | bidirectional | Port 0 I/O 5, defaults to input at power-on and is 5.5 V tolerant. |
| 10 | IO0_6 | bidirectional | Port 0 I/O 6, defaults to input at power-on and is 5.5 V tolerant. |
| 11 | IO0_7 | bidirectional | Port 0 I/O 7, defaults to input at power-on and is 5.5 V tolerant. |
| 12 | VSS | power_in | Supply ground. |
| 13 | IO1_0 | bidirectional | Port 1 I/O 0, defaults to input at power-on and is 5.5 V tolerant. |
| 14 | IO1_1 | bidirectional | Port 1 I/O 1, defaults to input at power-on and is 5.5 V tolerant. |
| 15 | IO1_2 | bidirectional | Port 1 I/O 2, defaults to input at power-on and is 5.5 V tolerant. |
| 16 | IO1_3 | bidirectional | Port 1 I/O 3, defaults to input at power-on and is 5.5 V tolerant. |
| 17 | IO1_4 | bidirectional | Port 1 I/O 4, defaults to input at power-on and is 5.5 V tolerant. |
| 18 | IO1_5 | bidirectional | Port 1 I/O 5, defaults to input at power-on and is 5.5 V tolerant. |
| 19 | IO1_6 | bidirectional | Port 1 I/O 6, defaults to input at power-on and is 5.5 V tolerant. |
| 20 | IO1_7 | bidirectional | Port 1 I/O 7, defaults to input at power-on and is 5.5 V tolerant. |
| 21 | AD0 | input | Address input 0, used with AD1 and AD2 to set the I2C-bus slave address. |
| 22 | SCL | input | I2C serial clock line input supporting 100 kHz, 400 kHz and 1 MHz clock frequencies. |
| 23 | SDA | bidirectional | I2C serial data line with 30 mA sink capability. |
| 24 | VDD | power_in | Supply voltage, 1.65 V to 5.5 V operating range. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-24 |
| Category | Interface ICs |
| Pins | 24 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Standby Current | ISTB | | 39 | 100 | µA | Standby mode; no load; VI = 0 V; fSCL = 0 Hz; I/O = inputs | 5 |
| Power-On Reset Voltage | VPOR | | 1.5 | 1.65 | V | | 5 |
| SDA Low-Level Output Current | IOL | 10 | | | mA | VOL = 0.4 V; VDD < 2.3 V | 5 |
| SDA Low-Level Output Current | IOL | 20 | | | mA | VOL = 0.4 V; VDD ≥ 2.3 V | 5 |
| SCL/SDA Leakage Current | IL | | | 1 | µA | VI = VDD or 0 V | 5 |
| SCL/SDA Input Capacitance | CI | | 4.6 | 6 | pF | VI = 0 V | 5 |
| I/O Low-Level Output Current | IOL | 8 | 20 | | mA | VOL = 0.5 V; VDD = 1.65 V | 5 |
| I/O Low-Level Output Current | IOL | 12 | 28 | | mA | VOL = 0.5 V; VDD = 2.3 V | 5 |
| I/O Low-Level Output Current | IOL | 17 | 35 | | mA | VOL = 0.5 V; VDD = 3.0 V | 5 |
| I/O Low-Level Output Current | IOL | 25 | 42 | | mA | VOL = 0.5 V; VDD = 4.5 V | 5 |
| Total Low-Level Output Current | IOL(tot) | | | 400 | mA | VOL = 0.5 V; VDD = 4.5 V | 5 |
| High-Level Output Voltage | VOH | 1.2 | | | V | IOH = -3 mA; VDD = 1.65 V | 5 |
| High-Level Output Voltage | VOH | 1.1 | | | V | IOH = -4 mA; VDD = 1.65 V | 5 |
| High-Level Output Voltage | VOH | 1.8 | | | V | IOH = -8 mA; VDD = 2.3 V | 5 |
| High-Level Output Voltage | VOH | 1.7 | | | V | IOH = -10 mA; VDD = 2.3 V | 5 |
| High-Level Output Voltage | VOH | 2.6 | | | V | IOH = -8 mA; VDD = 3.0 V | 5 |
| High-Level Output Voltage | VOH | 2.5 | | | V | IOH = -10 mA; VDD = 3.0 V | 5 |
| High-Level Output Voltage | VOH | 4.1 | | | V | IOH = -8 mA; VDD = 4.5 V | 5 |
| High-Level Output Voltage | VOH | 4 | | | V | IOH = -10 mA; VDD = 4.5 V | 5 |
| I/O Input Leakage Current | IL | | | 1 | µA | VDD = 5.5 V; VI = VDD or 0 V | 5 |
| I/O Capacitance | CI/O | | 3.7 | 5 | pF | | 5 |
| INT Low-Level Output Current | IOL | 6 | | | mA | VOL = 0.4 V | 5 |
| INT Output Capacitance | CO | | 2.1 | 5 | pF | | 5 |
| AD Pins Leakage Current | IL | | | 1 | µA | VI = VDD or 0 V | 5 |
| AD Pins Input Capacitance | CI | | 2.4 | 5 | pF | | 5 |
| Positive DC Supply Voltage | VDD | 1.65 | | 5.5 | V | | 4 |
| Switch Input / Output Voltage | VI/O | 0 | | 5.5 | V | | 4 |
| Operating Free-Air Temperature | TA | -55 | | 125 | °C | | 4 |
| DC Supply Voltage | VDD | -0.5 | | 7 | V | | 4 |
| Input / Output Pin Voltage | VI/O | -0.5 | | 7 | V | | 4 |
| Input Current | II | | | 20 | mA | | 4 |
| Output Current | IO | | | 50 | mA | | 4 |
| DC Supply Current | IDD | | | 100 | mA | | 4 |
| DC Ground Current | IGND | | | 600 | mA | | 4 |
| Total Power Dissipation | PTOT | | | 600 | mW | | 4 |
| Power Dissipation per Output | POUT | | | 200 | mW | | 4 |
| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 4 |
| Lead Temperature | TL | | | 260 | °C | 1 mm from case for 10 seconds | 4 |
| Junction Temperature Under Bias | TJ | | | 150 | °C | | 4 |
| Thermal Resistance TSSOP-24 | θJA | | 91 | | °C/W | TSSOP-24; FR4 board, 10 mm-by-1 inch 2 oz copper trace, no air flow | 4 |
| SCL Clock Frequency, Standard Mode | fSCL | 0 | | 0.1 | MHz | Standard Mode | 6 |
| SCL Clock Frequency, Fast Mode | fSCL | 0 | | 0.4 | MHz | Fast Mode | 6 |
| SCL Clock Frequency, Fast Mode + | fSCL | 0 | | 1 | MHz | Fast Mode + | 6 |
| Bus-Free Time STOP to START | tBUF | 0.5 | | | µs | Fast Mode + | 6 |
| Data Output Valid Time | tV(Q) | | | 200 | ns | VDD = 4.5 V to 5.5 V; CL ≤ 100 pF | 6 |
| Data Output Valid Time | tV(Q) | | | 350 | ns | VDD = 2.3 V to 4.5 V; CL ≤ 100 pF | 6 |
| Data Output Valid Time | tV(Q) | | | 550 | ns | VDD = 1.65 V to 2.3 V; CL ≤ 100 pF | 6 |
| Data Input Setup Time | tSU(D) | 100 | | | ns | CL ≤ 100 pF | 6 |
| Data Input Hold Time | tH(D) | 1 | | | µs | CL ≤ 100 pF | 6 |
| Interrupt Data Valid Time | tV(INT_N) | | | 4 | µs | CL ≤ 100 pF | 6 |
| Interrupt Reset Delay Time | tRST(INT_N) | | | 4 | µs | CL ≤ 100 pF | 6 |
## CAD (KiCad official)
- Symbol: `PCA9535EDTR2G`
- Footprint: `Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm`
- 3D model: TSSOP-24 (KiCad packages3D, STEP)
- 3D model files: `pca9535edtr2g-etched.step` / `pca9535edtr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pca9535edtr2g.step` / `pca9535edtr2g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/pca9535edtr2-d.pdf) (22 pp, sha256 `5f24973b534cbc15`, retrieved 2026-10-31, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pca9535edtr2g-datasheet.pdf)