Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

PCA9306

Texas Instruments · I2C level translator · VSSOP-8

Translates the two lines of an I2C or SMBus bus between a lower and a higher voltage domain, so a 1.8 or 3.3 V controller talks to 5 V devices on the same bus. Each channel is a pass transistor with no direction control, so it handles the open-drain, bidirectional traffic automatically, and the two VREF pins set the levels for each side. An EN pin isolates the buses when low. A tiny, standard fix for mixed-voltage I2C.

Pinout

Pin Name Type Function
1 GND power_in Ground, 0 V reference for the device.
2 VREF1 power_in Low-voltage-side reference supply voltage for SCL1 and SDA1. Recommended operating range 0 V to 5.5 V; supports translation from 1.2 V up to (VREF2 - 0.6 V).
3 SCL1 bidirectional Serial clock, low-voltage side. Open-drain I2C/SMBus clock line referenced to VREF1. High-impedance when EN is low.
4 SDA1 bidirectional Serial data, low-voltage side. Open-drain I2C/SMBus data line referenced to VREF1. High-impedance when EN is low.
5 SDA2 bidirectional Serial data, high-voltage side. Open-drain I2C/SMBus data line referenced to VREF2. High-impedance when EN is low.
6 SCL2 bidirectional Serial clock, high-voltage side. Open-drain I2C/SMBus clock line referenced to VREF2. High-impedance when EN is low.
7 VREF2 power_in High-voltage-side reference supply voltage for SCL2 and SDA2. Recommended operating range 0 V to 5.5 V; must be between VREF1 + 0.6 V and 5.5 V for translation.
8 EN input Switch enable input. When high, the translator switch is ON and SCL1/SDA1 connect to SCL2/SDA2. When low, the switch is off and all I/Os are high-impedance (also isolates the bus, e.g. a 400-kHz bus from a 100-kHz bus).

Key specifications

Parameter Value
Type Dual bidirectional I2C/SMBus level translator
Low side 1.0-3.6 V
High side 1.8-5.5 V
Channels 2 (SCL, SDA)
Direction control None (pass-transistor)
Enable EN pin isolates buses
Package VSSOP-8

Ordering variants

Same part, different packaging or reel option.

  • PCA9306DCUR (VSSOP-8, tape & reel)
  • PCA9306DCUT (VSSOP-8, small reel)
  • PCA9306DQER (X2SON-8)

CAD (KiCad official)

  • Symbol: Interface:PCA9306 (KiCad official)
  • Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
  • 3D model: VSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: pca9306-etched.step / pca9306-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pca9306.step / pca9306.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 1cd97c734729f2bf, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF