component
PCA82C250M
Public Made by Adomby adom
HGSEMI CAN Transceivers, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PCA82C250M
HGSEMI · CAN Transceivers · SOP-8
PCA82C250M from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | input | Transmitter data input: a LOW level drives the bus dominant, while HIGH or floating leaves it recessive; the MCU-side port is rated -0.3 V to VCC+0.3 V. |
| 2 | GND | power_in | Ground reference for the device; all voltage limits in the datasheet are referenced to this pin. |
| 3 | VCC | power_in | Supply voltage input, recommended 4.5 V to 5.5 V, with an absolute maximum of -0.3 V to +7 V. |
| 4 | RXD | output | Receiver data output that goes LOW when the bus is dominant and HIGH when the bus is recessive; the MCU-side port is rated -0.3 V to VCC+0.3 V. |
| 5 | VREF | power_in | Reference voltage output of 0.45VCC to 0.55VCC at V8 = 1 V ( |
| 6 | CANL | bidirectional | Low-level CAN bus line I/O, rated -36 V to +36 V on the bus side, with transient withstand of -200 V to +200 V per the Figure 7 test. |
| 7 | CANH | bidirectional | High-level CAN bus line I/O, rated -36 V to +36 V on the bus side, with transient withstand of -200 V to +200 V per the Figure 7 test. |
| 8 | Rs | input | Mode/slope-control input: tie to GND for high-speed mode, connect a resistor to GND for slope-control mode, or drive HIGH (≥0.75VCC) for low-power standby. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-8 |
| Category | Interface |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.3 | 7 | V | 2 | ||
| MCU-side pins TXD, RXD, VREF, Rs voltage | -0.3 | V | 2 | ||||
| Bus-side input voltage CANL, CANH | -36 | 36 | V | 2 | |||
| Transient voltage pins 6, 7 | Vtr | -200 | 200 | V | pins 6,7; see Fig. 7 | 2 | |
| Storage operating temperature range | -55 | 150 | ℃ | 2 | |||
| Ambient temperature | -40 | 125 | ℃ | 2 | |||
| Lead soldering temperature | TLEAD | 245 | ℃ | 10 s | 2 | ||
| Continuous power dissipation | 400 | mW | SOP8 package | 2 | |||
| Supply voltage | Vcc | 4.5 | 5.5 | V | 3 | ||
| Supply current, standby mode | Icc | 275 | uA | standby mode | 3 | ||
| Maximum transmission rate | 1/tbit | 1 | Mbaud | non-return-to-zero code | 3 | ||
| CANH, CANL input/output voltage | Vcan | -36 | 36 | V | 3 | ||
| Bus differential voltage | Vdiff | 1.5 | 3 | V | 3 | ||
| Ambient temperature | Tamb | -40 | 125 | ℃ | 3 | ||
| Low-level input voltage | VIL | -0.3 | V | input recessive (输入隐性) | 3 | ||
| High-level input current | VIH | -200 | 30 | uA | V1=4V | 3 | |
| Low-level input current | VIL | -100 | -600 | uA | V1=1V | 3 | |
| Recessive bus voltage | V6,7 | 2 | 3 | V | V1=4V, no load | 3 | |
| Off-state output leakage current | ILO | -2 | 2 | mA | -2V<(V6,V7)<-7V | 3 | |
| Off-state output leakage current | ILO | -10 | 10 | mA | -5V<(V6,V7)<36V | 3 | |
| CANH output voltage | V7 | 3 | 4.5 | V | V1=1V, VCC=4.75~5.5V | 3 | |
| CANH output voltage | V7 | 2.75 | 4.5 | V | V1=1V, VCC=4.75~5.5V | 3 | |
| CANL output voltage | V6 | 0.5 | 2 | V | V1=1V | 3 | |
| Differential output voltage pins 6, 7 | ΔV6,7 | 1.5 | 3 | V | V1=1V | 3 | |
| Differential output voltage pins 6, 7 | ΔV6,7 | 1.5 | V | V1=1V, RL=45Ω | 3 | ||
| Differential output voltage pins 6, 7 (recessive) | ΔV6,7 | -500 | 50 | mV | V1=4V, no load | 3 | |
| CANH short-circuit current | Isc7 | -100 | -200 | mA | V7=-36V | 3 | |
| CANL short-circuit current | Isc6 | 200 | mA | V6=+36V | 3 | ||
| Recessive differential input voltage | Vdiff(r) | -1 | 0.5 | V | NOTE1 | 4 | |
| Recessive differential input voltage | Vdiff(r) | -1 | 0.4 | V | -7V<(V6,V7)<12V; NOTE1 | 4 | |
| Dominant differential input voltage | Vdiff(d) | 0.9 | 5 | V | -7V<(V6,V7)<12V, 非待机模式 | 4 | |
| Dominant differential input voltage | Vdiff(d) | 1 | 5 | V | 4 | ||
| Dominant differential input voltage (standby) | Vdiff(d) | 0.97 | 5 | V | 待机模式 | 4 | |
| Dominant differential input voltage (standby) | Vdiff(d) | 0.91 | 5 | V | VCC=4.5~5.1V, 待机模式 | 4 | |
| Differential input hysteresis | Vdiff(hys) | 150 | mV | see Fig. 4 | 4 | ||
| Low-level output voltage pin 4 | VOL | 0 | V | I4=1mA | 4 | ||
| Low-level output voltage pin 4 | VOL | 0 | 1.5 | V | I4=10mA | 4 | |
| CANH, CANL input impedance | Ri | 5 | 25 | KΩ | 4 | ||
| Differential input impedance | Rdiff | 20 | 100 | KΩ | 4 | ||
| Minimum bit time | tbit | 1 | us | R8=0Ω | 5 | ||
| TXD to bus active delay | tonTXD | 50 | ns | R8=0Ω | 5 | ||
| TXD to bus inactive delay | toffTXD | 40 | 80 | ns | R8=0Ω | 5 | |
| TXD to receiver active delay | tonRXD | 55 | 120 | ns | R8=0Ω | 5 | |
| TXD to receiver inactive delay | toffRXD | 100 | 190 | ns | R8=0Ω | 5 | |
| TXD to receiver inactive delay | toffRXD | 300 | 400 | ns | R8=47KΩ | 5 | |
| CANH, CANL slew rate | /SR/ | 7 | V/us | R8=47KΩ | 5 | ||
| Wake-up delay from standby via pin 8 | twake | 20 | us | see Fig. 5 | 5 | ||
| Bus dominant to RXD low delay in standby | tdRXDL | 3 | us | V8=4V; see Fig. 6 | 5 | ||
| Slope control mode current | Islope | -10 | -200 | uA | 5 | ||
| Supply current, dominant | I3 | 78 | mA | dominant; V1=1V; VCC<5.1V | 5 | ||
| Supply current, dominant | I3 | 80 | mA | dominant; V1=1V; VCC<5.25V | 5 | ||
| Supply current, dominant | I3 | 85 | mA | dominant; V1=1V; VCC<5.5V | 5 | ||
| Supply current, recessive | I3 | 10 | mA | recessive; V1=4V; R8=47kΩ | 5 | ||
| Supply current, standby mode | I3 | 275 | uA | standby mode; NOTE2 | 5 |
CAD (KiCad official)
- Symbol:
PCA82C250M - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
pca82c250m-etched.step/pca82c250m-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pca82c250m.step/pca82c250m.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (12 pp, sha256
b14105ddc58a806f, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PCA82C250M
**HGSEMI** · CAN Transceivers · SOP-8
PCA82C250M from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | TXD | input | Transmitter data input: a LOW level drives the bus dominant, while HIGH or floating leaves it recessive; the MCU-side port is rated -0.3 V to VCC+0.3 V. |
| 2 | GND | power_in | Ground reference for the device; all voltage limits in the datasheet are referenced to this pin. |
| 3 | VCC | power_in | Supply voltage input, recommended 4.5 V to 5.5 V, with an absolute maximum of -0.3 V to +7 V. |
| 4 | RXD | output | Receiver data output that goes LOW when the bus is dominant and HIGH when the bus is recessive; the MCU-side port is rated -0.3 V to VCC+0.3 V. |
| 5 | VREF | power_in | Reference voltage output of 0.45VCC to 0.55VCC at V8 = 1 V (|I5| < 50 µA), and 0.4VCC to 0.6VCC at V8 = 4 V (|I5| < 5 µA). |
| 6 | CANL | bidirectional | Low-level CAN bus line I/O, rated -36 V to +36 V on the bus side, with transient withstand of -200 V to +200 V per the Figure 7 test. |
| 7 | CANH | bidirectional | High-level CAN bus line I/O, rated -36 V to +36 V on the bus side, with transient withstand of -200 V to +200 V per the Figure 7 test. |
| 8 | Rs | input | Mode/slope-control input: tie to GND for high-speed mode, connect a resistor to GND for slope-control mode, or drive HIGH (≥0.75VCC) for low-power standby. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-8 |
| Category | Interface |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.3 | | 7 | V | | 2 |
| MCU-side pins TXD, RXD, VREF, Rs voltage | | -0.3 | | | V | | 2 |
| Bus-side input voltage CANL, CANH | | -36 | | 36 | V | | 2 |
| Transient voltage pins 6, 7 | Vtr | -200 | | 200 | V | pins 6,7; see Fig. 7 | 2 |
| Storage operating temperature range | | -55 | | 150 | ℃ | | 2 |
| Ambient temperature | | -40 | | 125 | ℃ | | 2 |
| Lead soldering temperature | TLEAD | | | 245 | ℃ | 10 s | 2 |
| Continuous power dissipation | | | | 400 | mW | SOP8 package | 2 |
| Supply voltage | Vcc | 4.5 | | 5.5 | V | | 3 |
| Supply current, standby mode | Icc | | | 275 | uA | standby mode | 3 |
| Maximum transmission rate | 1/tbit | | | 1 | Mbaud | non-return-to-zero code | 3 |
| CANH, CANL input/output voltage | Vcan | -36 | | 36 | V | | 3 |
| Bus differential voltage | Vdiff | 1.5 | | 3 | V | | 3 |
| Ambient temperature | Tamb | -40 | | 125 | ℃ | | 3 |
| Low-level input voltage | VIL | -0.3 | | | V | input recessive (输入隐性) | 3 |
| High-level input current | VIH | -200 | | 30 | uA | V1=4V | 3 |
| Low-level input current | VIL | -100 | | -600 | uA | V1=1V | 3 |
| Recessive bus voltage | V6,7 | 2 | | 3 | V | V1=4V, no load | 3 |
| Off-state output leakage current | ILO | -2 | | 2 | mA | -2V<(V6,V7)<-7V | 3 |
| Off-state output leakage current | ILO | -10 | | 10 | mA | -5V<(V6,V7)<36V | 3 |
| CANH output voltage | V7 | 3 | | 4.5 | V | V1=1V, VCC=4.75~5.5V | 3 |
| CANH output voltage | V7 | 2.75 | | 4.5 | V | V1=1V, VCC=4.75~5.5V | 3 |
| CANL output voltage | V6 | 0.5 | | 2 | V | V1=1V | 3 |
| Differential output voltage pins 6, 7 | ΔV6,7 | 1.5 | | 3 | V | V1=1V | 3 |
| Differential output voltage pins 6, 7 | ΔV6,7 | 1.5 | | | V | V1=1V, RL=45Ω | 3 |
| Differential output voltage pins 6, 7 (recessive) | ΔV6,7 | -500 | | 50 | mV | V1=4V, no load | 3 |
| CANH short-circuit current | Isc7 | -100 | | -200 | mA | V7=-36V | 3 |
| CANL short-circuit current | Isc6 | | | 200 | mA | V6=+36V | 3 |
| Recessive differential input voltage | Vdiff(r) | -1 | | 0.5 | V | NOTE1 | 4 |
| Recessive differential input voltage | Vdiff(r) | -1 | | 0.4 | V | -7V<(V6,V7)<12V; NOTE1 | 4 |
| Dominant differential input voltage | Vdiff(d) | 0.9 | | 5 | V | -7V<(V6,V7)<12V, 非待机模式 | 4 |
| Dominant differential input voltage | Vdiff(d) | 1 | | 5 | V | | 4 |
| Dominant differential input voltage (standby) | Vdiff(d) | 0.97 | | 5 | V | 待机模式 | 4 |
| Dominant differential input voltage (standby) | Vdiff(d) | 0.91 | | 5 | V | VCC=4.5~5.1V, 待机模式 | 4 |
| Differential input hysteresis | Vdiff(hys) | | | 150 | mV | see Fig. 4 | 4 |
| Low-level output voltage pin 4 | VOL | 0 | | | V | I4=1mA | 4 |
| Low-level output voltage pin 4 | VOL | 0 | | 1.5 | V | I4=10mA | 4 |
| CANH, CANL input impedance | Ri | 5 | | 25 | KΩ | | 4 |
| Differential input impedance | Rdiff | 20 | | 100 | KΩ | | 4 |
| Minimum bit time | tbit | 1 | | | us | R8=0Ω | 5 |
| TXD to bus active delay | tonTXD | | | 50 | ns | R8=0Ω | 5 |
| TXD to bus inactive delay | toffTXD | 40 | | 80 | ns | R8=0Ω | 5 |
| TXD to receiver active delay | tonRXD | 55 | | 120 | ns | R8=0Ω | 5 |
| TXD to receiver inactive delay | toffRXD | 100 | | 190 | ns | R8=0Ω | 5 |
| TXD to receiver inactive delay | toffRXD | 300 | | 400 | ns | R8=47KΩ | 5 |
| CANH, CANL slew rate | /SR/ | 7 | | | V/us | R8=47KΩ | 5 |
| Wake-up delay from standby via pin 8 | twake | | | 20 | us | see Fig. 5 | 5 |
| Bus dominant to RXD low delay in standby | tdRXDL | | | 3 | us | V8=4V; see Fig. 6 | 5 |
| Slope control mode current | Islope | -10 | | -200 | uA | | 5 |
| Supply current, dominant | I3 | | | 78 | mA | dominant; V1=1V; VCC<5.1V | 5 |
| Supply current, dominant | I3 | | | 80 | mA | dominant; V1=1V; VCC<5.25V | 5 |
| Supply current, dominant | I3 | | | 85 | mA | dominant; V1=1V; VCC<5.5V | 5 |
| Supply current, recessive | I3 | | | 10 | mA | recessive; V1=4V; R8=47kΩ | 5 |
| Supply current, standby mode | I3 | | | 275 | uA | standby mode; NOTE2 | 5 |
## CAD (KiCad official)
- Symbol: `PCA82C250M`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `pca82c250m-etched.step` / `pca82c250m-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pca82c250m.step` / `pca82c250m.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HGSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603515461116452864) (12 pp, sha256 `b14105ddc58a806f`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pca82c250m-datasheet.pdf)