# PBSS5540X

**Nexperia** · Bipolar (BJT) · SOT-89

PBSS5540X from Nexperia, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E | passive | Emitter of the PNP transistor; the device-level limit is VEBO -6 V (open collector). |
| 2 | C | passive | Collector of the PNP transistor; VCEO is -40 V (open base), IC is -4 A continuous, and ICM is -10 A single pulse (tp ≤ 10 ms). |
| 3 | B | passive | Base of the PNP transistor; IB is limited to -1 A continuous and IBM to -2 A single pulse (tp ≤ 1 ms). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-89 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `PBSS5540X`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files: `pbss5540x-etched.step` / `pbss5540x-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pbss5540x.step` / `pbss5540x.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Nexperia datasheet](https://assets.nexperia.com/documents/data-sheet/PBSS5540X.pdf) (13 pp, sha256 `de2b9a39cb2bdcee`, retrieved 2026-10-09, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/pbss5540x-datasheet.pdf)