component
PBSS5320T
Public Made by Adomby adom
Nexperia Bipolar (BJT), SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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PBSS5320T
Nexperia · Bipolar (BJT) · SOT-23
PBSS5320T from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | B | passive | Base terminal of the PNP transistor; the datasheet gives no pin-specific limit, and the device limits in Table 5 apply (IB base current -0.5 A max). |
| 2 | E | passive | Emitter terminal of the PNP transistor; the datasheet gives no pin-specific limit, and the device limits in Table 5 apply (VEBO -5 V max). |
| 3 | C | passive | Collector terminal of the PNP transistor; the datasheet gives no pin-specific limit, and the device limits in Table 5 apply (IC -2 A, ICRM -3 A max). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
CAD (KiCad official)
- Symbol:
PBSS5320T - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
pbss5320t-etched.step/pbss5320t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pbss5320t.step/pbss5320t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (11 pp, sha256
564ff84b7faf2f28, retrieved 2026-10-09, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# PBSS5320T
**Nexperia** · Bipolar (BJT) · SOT-23
PBSS5320T from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | B | passive | Base terminal of the PNP transistor; the datasheet gives no pin-specific limit, and the device limits in Table 5 apply (IB base current -0.5 A max). |
| 2 | E | passive | Emitter terminal of the PNP transistor; the datasheet gives no pin-specific limit, and the device limits in Table 5 apply (VEBO -5 V max). |
| 3 | C | passive | Collector terminal of the PNP transistor; the datasheet gives no pin-specific limit, and the device limits in Table 5 apply (IC -2 A, ICRM -3 A max). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## CAD (KiCad official)
- Symbol: `PBSS5320T`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `pbss5320t-etched.step` / `pbss5320t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `pbss5320t.step` / `pbss5320t.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://assets.nexperia.com/documents/data-sheet/PBSS5320T.pdf) (11 pp, sha256 `564ff84b7faf2f28`, retrieved 2026-10-09, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/pbss5320t-datasheet.pdf)