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PBRN123ET

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Nexperia Digital Transistors, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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PBRN123ET

Nexperia · Digital Transistors · SOT-23

PBRN123ET from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I input Input (base) terminal of the NPN PB RET, with a limiting input voltage of +22 V to -10 V per the limiting values table.
2 GND power_in Ground (emitter) terminal of the transistor.
3 O output Output (collector) terminal, rated for 600 mA output current (700 mA absolute maximum on a 1 cm² collector pad) with VCBO and VCEO of 40 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
collector-base voltage VCBO 40 V open emitter 3
collector-emitter voltage VCEO 40 V open base 3
emitter-base voltage VEBO 10 V open collector 3
input voltage positive VI 22 V positive 3
input voltage negative VI -10 V negative 3
output current IO 600 mA [1] device mounted on FR4 PCB, single-sided, standard footprint 3
output current IO 700 mA [2] device mounted on FR4 PCB, mounting pad for collector 1 cm2 3
repetitive peak output current IORM 800 mA tp ≤ 1 ms; δ ≤ 0.33 3
total power dissipation Ptot 250 mW Tamb ≤ 25 °C; [1] standard footprint 3
total power dissipation Ptot 370 mW Tamb ≤ 25 °C; [2] mounting pad for collector 1 cm2 3
junction temperature Tj 150 °C 3
ambient temperature Tamb -65 150 °C 3
storage temperature Tstg -65 150 °C 3
thermal resistance from junction to ambient Rth(j-a) 500 K/W in free air; [1] FR4 PCB, single-sided, standard footprint 4
thermal resistance from junction to ambient Rth(j-a) 338 K/W in free air; [2] FR4 PCB, mounting pad for collector 1 cm2 4
thermal resistance from junction to solder point Rth(j-sp) 105 K/W 4
collector-base breakdown voltage V(BR)CBO 40 V IC = 100 µA; IE = 0 A; Tamb = 25 °C 5
collector-emitter breakdown voltage V(BR)CEO 40 V IC = 10 mA; IB = 0 A; Tamb = 25 °C 5
collector-base cut-off current ICBO 100 nA VCB = 30 V; IE = 0 A; Tamb = 25 °C 5
collector-emitter cut-off current ICEO 0.5 µA VCE = 30 V; IB = 0 A; Tamb = 25 °C 5
emitter-base cut-off current IEBO 2 mA VEB = 5 V; IC = 0 A; Tamb = 25 °C 5
DC current gain hFE 70 135 VCE = 5 V; IC = 50 mA; Tamb = 25 °C 5
DC current gain hFE 280 460 VCE = 5 V; IC = 300 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C 5
DC current gain hFE 350 560 VCE = 5 V; IC = 600 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C 5
DC current gain hFE 340 550 VCE = 5 V; IC = 800 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C 5
collector-emitter saturation voltage VCEsat 25 35 mV IC = 50 mA; IB = 2.5 mA; Tamb = 25 °C 5
collector-emitter saturation voltage VCEsat 60 85 mV IC = 200 mA; IB = 10 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C 5
collector-emitter saturation voltage VCEsat 160 220 mV IC = 500 mA; IB = 10 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C 5
collector-emitter saturation voltage VCEsat 290 550 mV IC = 600 mA; IB = 6 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C 5
collector-emitter saturation voltage VCEsat 630 1150 mV IC = 800 mA; IB = 8 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C 5
off-state input voltage VI(off) 0.6 1 1.8 V VCE = 5 V; IC = 100 µA; Tamb = 25 °C 5
on-state input voltage VI(on) 1 1.3 2 V VCE = 0.3 V; IC = 20 mA; Tamb = 25 °C 5
bias resistor 1 R1 1.54 2.2 2.96 kΩ [1] see section 'Test information' (resistor calculation and test conditions) 5
bias resistor ratio R2/R1 0.9 1 1.1 [1] see section 'Test information' (resistor calculation and test conditions) 5

CAD (KiCad official)

  • Symbol: PBRN123ET
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: pbrn123et-etched.step / pbrn123et-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pbrn123et.step / pbrn123et.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (12 pp, sha256 11b2a3a58cdd6527, retrieved 2026-10-17, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF