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PBRN113ET

Public Made by Adom

by adom

Nexperia Digital Transistors, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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PBRN113ET

Nexperia · Digital Transistors · SOT-23

PBRN113ET from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I input Input pin (base) of the bias-resistor network, with bias resistor R1 = 1 kΩ (0.7 kΩ to 1.3 kΩ) and input voltage limited to +10 V / −10 V per the limiting values.
2 GND power_in Ground pin (emitter), the common reference for the input and the bias resistor network.
3 O output Output pin (collector), rated for 600 mA output current (700 mA with the larger collector mounting pad) and 800 mA repetitive peak output current for tp ≤ 1 ms.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector-base breakdown voltage V(BR)CBO 40 V IC = 100 µA; IE = 0 A; Tamb = 25 °C 5
Collector-emitter breakdown voltage V(BR)CEO 40 V IC = 10 mA; IB = 0 A; Tamb = 25 °C 5
Collector-base cut-off current ICBO 100 nA VCB = 30 V; IE = 0 A; Tamb = 25 °C 5
Collector-emitter cut-off current ICEO 0.5 µA VCE = 30 V; IB = 0 A; Tamb = 25 °C 5
Emitter-base cut-off current IEBO 4 mA VEB = 5 V; IC = 0 A; Tamb = 25 °C 5
DC current gain hFE 40 75 VCE = 5 V; IC = 50 mA; Tamb = 25 °C 5
DC current gain hFE 180 300 VCE = 5 V; IC = 300 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C 5
DC current gain hFE 250 400 VCE = 5 V; IC = 600 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C 5
DC current gain hFE 270 420 VCE = 5 V; IC = 800 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C 5
Collector-emitter saturation voltage VCEsat 25 35 mV IC = 50 mA; IB = 2.5 mA; Tamb = 25 °C 5
Collector-emitter saturation voltage VCEsat 60 85 mV IC = 200 mA; IB = 10 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C 5
Collector-emitter saturation voltage VCEsat 160 220 mV IC = 500 mA; IB = 10 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C 5
Collector-emitter saturation voltage VCEsat 320 550 mV IC = 600 mA; IB = 6 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C 5
Collector-emitter saturation voltage VCEsat 680 1150 mV IC = 800 mA; IB = 8 mA; pulsed; tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C 5
Off-state input voltage VI(off) 0.6 1 1.5 V VCE = 5 V; IC = 100 µA; Tamb = 25 °C 5
On-state input voltage VI(on) 1 1.3 1.8 V VCE = 0.3 V; IC = 20 mA; Tamb = 25 °C 5
Bias resistor 1 R1 0.7 1 1.3 kΩ [1] See section "Test information" 5
Bias resistor ratio R2/R1 0.9 1 1.1 [1] See section "Test information" 5
Collector-emitter voltage (open base) VCEO 40 V open base 3
Collector-base voltage VCBO 40 V open emitter 3
Emitter-base voltage VEBO 10 V open collector 3
Input voltage VI 10 V positive 3
Input voltage VI -10 V negative 3
Output current IO 600 mA [1] Device mounted on FR4 PCB, single-sided, 35 μm copper, tin-plated and standard footprint 3
Output current IO 700 mA [2] Device mounted on FR4 PCB, mounting pad for collector 1 cm2 3
Repetitive peak output current IORM 800 mA tp ≤ 1 ms; δ ≤ 0.33 3
Total power dissipation Ptot 250 mW Tamb ≤ 25 °C [1] 3
Total power dissipation Ptot 370 mW Tamb ≤ 25 °C [2] 3
Junction temperature Tj 150 °C 3
Ambient temperature Tamb -65 150 °C 3
Storage temperature Tstg -65 150 °C 3
Thermal resistance from junction to ambient Rth(j-a) 500 K/W [1] in free air; FR4 PCB, single-sided, 35 μm copper, standard footprint 4
Thermal resistance from junction to ambient Rth(j-a) 338 K/W [2] FR4 PCB, mounting pad for collector 1 cm2 4
Thermal resistance from junction to solder point Rth(j-sp) 105 K/W 4

CAD (KiCad official)

  • Symbol: PBRN113ET
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: pbrn113et-etched.step / pbrn113et-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pbrn113et.step / pbrn113et.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (12 pp, sha256 3cdfa8f3ce507df9, retrieved 2026-10-17, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF