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PAM8106TVR

Diodes Incorporated · Audio Power OpAmps · QFN-32(5x5)

PAM8106TVR from Diodes Incorporated, in a QFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No connect, floating or connect to GND on PCB.
2 RINN input Negative differential audio input for right channel; input voltage range GND-0.3 to 5.5V.
3 RINP input Positive differential audio input for right channel; input voltage range GND-0.3 to 5.5V.
4 MUTE input A logic-high disables the outputs and a logic low enables them; high level 3 to 5.5V, low level 0 to 0.5V.
5 AVDD power_out 5V analog supply, internally generated; requires a 0.1uF to 1uF capacitor to ground and may not power external circuitry.
6 LINP input Positive differential audio input for left channel; input voltage range GND-0.3 to 5.5V.
7 LINN input Negative differential audio input for left channel; input voltage range GND-0.3 to 5.5V.
8 NC unconnected No connect, floating or connect to GND on PCB.
9 PGNDL power_in Power ground for left channel H-bridge.
10 PVCCL power_in Power supply for left channel H-bridge, not connected to PVCCR or AVCC; 4.5V to 15V operation.
11 LOUTN output Class-D H-bridge negative output for left channel.
12 BSLN passive Bootstrap I/O for left channel, negative high-side FET; connect at least 220nF capacitor to LOUTN.
13 BSLP passive Bootstrap I/O for left channel, positive high-side FET; connect at least 220nF capacitor to LOUTP.
14 LOUTP output Class-D H-bridge positive output for left channel.
15 PVCCL power_in Power supply for left channel H-bridge, not connected to PVCCR or AVCC; 4.5V to 15V operation.
16 PGNDL power_in Power ground for left channel H-bridge.
17 SSMCTL input SSM control: logic-low enables and logic-high disables spread spectrum (high level complies to AVDD); SSM is on if left floating due to an embedded pull-up.
18 PL input Reference voltage for power-limit function, set by a resistor to ground with a 1uF capacitor to ground.
19 V2P5 power_out 2.5V reference for analog cells; at least 0.47uF capacitor recommended.
20 AGND power_in Analog ground.
21 VCLAMP power_out Internally generated voltage supply for bootstrap capacitors; needs 1uF capacitor to ground rated at least 25V.
22 AVCC power_in High-voltage analog power supply, 4.5V to 15V.
23 SD input Shutdown signal (low = shutdown, high = operational), compliant to AVCC; high level 3V to AVCC, low 0 to 0.5V; never leave unconnected.
24 NC unconnected No connect, floating or connect to GND on PCB.
25 PGNDR power_in Power ground for right channel H-bridge.
26 PVCCR power_in Power supply for right channel H-bridge, not connected to PVCCL or AVCC; 4.5V to 15V operation.
27 ROUTP output Class-D H-bridge positive output for right channel.
28 BSRP passive Bootstrap I/O for right channel, positive high-side FET; connect at least 220nF capacitor to ROUTP.
29 BSRN passive Bootstrap I/O for right channel, negative high-side FET; connect at least 220nF capacitor to ROUTN.
30 ROUTN output Class-D H-bridge negative output for right channel.
31 PVCCR power_in Power supply for right channel H-bridge, not connected to PVCCL or AVCC; 4.5V to 15V operation.
32 PGNDR power_in Power ground for right channel H-bridge.
33 Thermal Pad power_in Connect to ground; thermal pad should be soldered down in all applications to secure the device to the PCB.

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package QFN-32(5x5)
Category Operational Amplifier/Comparator
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage (electrical) AVCC 4.5 15 V 5
Quiescent Current (No Load) IDD 15 30 mA No load 5
Supply Quiescent Current in Shutdown Mode ISD 15 25 µA Shutdown = 0V 5
Output Offset Voltage (differential) /VOS/ 50 mV INN and INP Connected Together 5
Internal Analog Supply Voltage AVDD 5.2 5.7 V VCC = 6V to 15V 5
Input High Level VIH 3 V 5
Input Low Level VIL 0.5 V 5
Continuous Output Power PO 6 W THD+N = 0.12%, f = 1kHz, RL = 8Ω 5
Continuous Output Power PO 8.4 W THD+N = 1%, f = 1kHz, RL = 8Ω 5
Continuous Output Power PO 10.4 W THD+N = 10%, f = 1kHz, RL = 8Ω 5
Total Harmonic Distortion plus Noise THD+N 0.05 % PO = 5W, f = 1kHz, RL = 8Ω 5
Mute Current (No Load) IMUTE 11 mA 5
Drain-Source On-State Resistance High Side RDS(ON) 210 mΩ IO = 0.5A, TJ = +25°C 5
Drain-Source On-State Resistance Low Side RDS(ON) 210 mΩ IO = 0.5A, TJ = +25°C 5
Drain-Source On-State Resistance Total RDS(ON) 420 mΩ IO = 0.5A, TJ = +25°C 5
Efficiency ƞ 92 % Po=10W 5
Power Supply Ripple Rejection Ratio PSRR -70 dB 1VPP Ripple, f = 1kHz, Inputs AC-Coupled to Ground 5
Turn-on Time TON 25 ms SD from "L" to "H" 5
Oscillator frequency fOSC 300 kHz 5
Output Integrated Noise VN 170 µVrms 20Hz to 22kHz, A-Weighting, SSM OFF, Gain = 32dB 5
Crosstalk CS -90 dB PO = 3W, RL = 8Ω, f = 1kHz 5
Signal to Noise Ratio SNR 95 dB Maximum Output at THD+N < 0.5%, f = 1kHz 5
Closed Loop Gain GV 32 dB 5
2.5V Bias Voltage V2P5 2.5 V No Load 5
Over-Temperature Shutdown OTS 160 °C 5
Thermal Hysteresis OTH 45 °C 5
Supply Voltage (absolute maximum) PVCC/AVCC -0.3 18 V TA = +25°C 4
Junction Temperature Range (absolute maximum) TJ -40 150 °C TA = +25°C 4
Storage Temperature TSTG -65 150 °C 4
Maximum soldering Temperature - Lead Temperature 1.6mm (1/16inch) TSDR 260 °C 5sec 4
Input voltages for RINN, RINP, LINN, LINP, MUTE, PL (absolute maximum) VI 5.5 V Min is (GND-0.3) 4
Supply Voltage (recommended) PVCC/AVCC 4.5 15 V TA = +25°C 4
Input voltages RINN-RINP, LINN-LINP VI 0 2 VRMS 4
High-Level Input voltage for SD SD 3 V 3 to AVCC 4
Low-Level Input voltage for SD SD 0 0.5 V 4
High-Level Input voltage for MUTE MUTE 3 5.5 V 4
Low-Level Input voltage for MUTE MUTE 0 0.5 V 4
Operating Free-Air Temperature range TA -40 85 °C 4
Operating Junction Temperature range TJ -40 150 °C 4
Thermal Resistance (Junction to Case) θJC 5 °C/W W-QFN5050-32 (Standard) 4
Thermal Resistance (Junction to Ambient) θJA 33 °C/W W-QFN5050-32 (Standard) 4

CAD (KiCad official)

  • Symbol: PAM8106TVR
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: pam8106tvr-etched.step / pam8106tvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pam8106tvr.step / pam8106tvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (13 pp, sha256 7e0711798f0d2878, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF