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PAC5285-T

Qorvo · Brushless DC (BLDC) Motor Driver · TQFN-40(6x6)

PAC5285-T from Qorvo, in a TQFN-40(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PC3/AD3 bidirectional IO port PC3 or ADC channel AD3.
2 PC2/AD2 bidirectional IO port PC2 or ADC channel AD2.
3 VCC33 power_out Internally generated 3.3V supply; connect a 10V/1µF ceramic capacitor from VCC33 to VSS close to the device.
4 NC unconnected Not connected; leave floating.
5 NC unconnected Not connected; leave floating.
6 VSS power_in Ground.
7 PB input Active-low push-button input for hibernate wake-up.
8 ISNSN input Motor current sense, negative terminal.
9 ISNSP input Motor current sense, positive terminal.
10 SRC passive Inverter source node, connect to ISNSP.
11 SRC passive Inverter source node, connect to ISNSP.
12 OUTU output Phase U output.
13 VM power_in Main power supply (motor voltage).
14 VM power_in Main power supply (motor voltage).
15 OUTV output Phase V output.
16 SRC passive Inverter source node, connect to ISNSP.
17 SRC passive Inverter source node, connect to ISNSP.
18 OUTW output Phase W output.
19 VM power_in Main power supply (motor voltage).
20 VM power_in Main power supply (motor voltage); connect a high value electrolytic capacitor in parallel with a 0.1µF ceramic from VM to VSS with a trace shorter than 10mm.
21 VCP passive Charge pump output; connect a 10V/1µF ceramic capacitor between VCP and VM.
22 CPH passive Charge pump switch node; connect a VM*1.5V rated 0.1µF flying capacitor between CPL and CPH.
23 CPL passive Charge pump switch node; connect a VM*1.5V rated 0.1µF flying capacitor between CPL and CPH.
24 VSYS power_out Internally generated 5V supply; connect a 10V/4.7µF ceramic capacitor from VSYS to VSS close to the device.
25 VSYS power_out Internally generated 5V supply; connect a 10V/4.7µF ceramic capacitor from VSYS to VSS close to the device.
26 NC unconnected Not connected; leave floating.
27 NC unconnected Not connected; leave floating.
28 PA6 bidirectional IO port PA6.
29 PA7 bidirectional IO port PA7.
30 NC unconnected Not connected; leave floating.
31 PD1 bidirectional IO port PD1.
32 PD0 bidirectional IO port PD0.
33 PE0 bidirectional IO port PE0.
34 PE1 bidirectional IO port PE1.
35 PE2 bidirectional IO port PE2.
36 PE3 bidirectional IO port PE3.
37 VCCIO power_out Internally generated 3.3V IO supply; for 3.3V IO connect a 10V/1µF ceramic capacitor close to the device, for 5V connect to VSYS.
38 VCORE power_out Internally generated digital 1.8V supply; connect a 6.3V/1µF ceramic capacitor from VCORE to VSS close to the device.
39 PC5/AD5 bidirectional IO port PC5 or ADC channel AD5.
40 PC4/AD4 bidirectional IO port PC4 or ADC channel AD4.
41 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Qorvo
Package TQFN-40(6x6)
Category Motor Driver ICs
Pins 41

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VM to VSS Supply Input Voltage VM -0.3 40 V 10
VCP to VM Charge Pump Voltage VCP -0.3 6 V 10
VSYS to VSS VSYS -0.3 6 V 10
VCC33 to VSS VCC33 -0.3 4.1 V 10
VCORE to VSS VCORE -0.3 2.5 V 10
PB to VSS PB -0.3 6 V 10
Motor Phase Voltage OUTU/V/W OUTx -1 44 V 10
Pin injection current IPxy 7.5 mA 10
Sum of pin injection current ΣIPxy 25 mA 10
Ambient Temperature TA -40 105 °C 10
Storage Temperature TSTG -40 140 °C 10
ESD HBM HBM 2 kV 10
ESD CDM CDM 1 kV All pins 10
VM Supply Input Voltage VM 5.5 12 27 V 10
VM hibernate mode supply current IHIB;VM 8 µA Hibernate mode active, VM = 12V 16
VM operating voltage range VOP;VM 5.5 27 V 16
VM under-voltage lockout rising VUVLOR;VM 5.2 5.4 V 16
VSYS under-voltage lockout rising VUVLOR;VSYS 4.35 4.5 4.65 V 17
VCC33 power OK threshold kPOK;VCC33 85 90 95 % VCC33 rising, hysteresis = 10% 17
VCORE power OK threshold kPOK;VCORE 85 90 95 % VCORE rising, hysteresis = 10% 17
VREF Reference Voltage VREF -0.5 2.5 0.5 V TA = 25°C (tolerance printed in %) 17
Trimmed CLKREF frequency fCLKREF 3.96 4 4.05 MHz TA = 25°C 17
Trimmed CLKREF frequency fCLKREF 3.92 4 4.08 MHz TA = -40°C to 105°C 17
DA input common mode range VICMR;DA -0.3 3.3 V 22
DA input offset voltage VOS;DA -8 8 mV Gain = 4x 22
DA gain AVZI;DA -2 4 2 % Gain = 4x, VDAxP=VDAxN=0V, TA = 25C 22
Inverter MOSFET RDS(ON) RDS(ON) 300 600 mΩ 24
Temperature warning threshold TWARN 140 ºC 22
Temperature fault threshold TFAULT 165 ºC 22
ADC INL 1 LSB 27
Trimmed RC oscillator frequency fTRIM -2 4 2 MHz TA = -40°C to 105°C (tolerance printed in %) 33
PAx/PDx/PEx high-level input voltage VIH 3 V VCCIO = 5V 39
PAx/PDx/PEx low-level input voltage VIL 0.8 V VCCIO = 5V 39
Weak pull-up resistance RPU 53 66 87 kΩ VCCIO = 5V 39
Weak pull-down resistance RPD 63 108 244 kΩ VCCIO = 5V 39
Input leakage current IIL -10 0 10 µA TA = 125°C 39
Operating junction temperature range TJ -40 125 C 52
Junction-to-case thermal resistance JC 2.897 C/W 52
Junction-to-ambient thermal resistance JA 23.36 C/W 52

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin Compatible with both lead-free (260 °C max. reflow temperature) and tin/lead (245 °C max. reflow temperature) soldering processes. PAC5285 57

CAD (KiCad official)

  • Symbol: PAC5285-T
  • Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
  • 3D model: TQFN-40(6x6) (KiCad packages3D, STEP)
  • 3D model files: pac5285-t-etched.step / pac5285-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); pac5285-t.step / pac5285-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Qorvo datasheet (58 pp, sha256 3a02d75415c2f64d, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF