component
PAC5225QM
Public Made by Adomby adom
Qorvo Motor Driver ICs, TQFN-48-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "pac5225qm",
"version": "0.1.0",
"type": "component",
"description": "Qorvo Motor Driver ICs, TQFN-48-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power management ics",
"pac5225qm",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"pac5225qm.kicad_sym",
"pac5225qm.kicad_mod",
"pac5225qm.glb",
"pac5225qm.step",
"pac5225qm.lbr",
"docs/hero.png",
"docs/pac5225qm-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"pac5225qm-hero.glb",
"pac5225qm-hero.overlay.json",
"pac5225qm-etched.glb"
],
"component": {
"mpn": "PAC5225QM",
"manufacturer": "Qorvo",
"package": "TQFN-48-EP(6x6)",
"pin_count": 49,
"category": "Power Management ICs",
"subcategory": "Motor Driver ICs",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/6a793fde3686188ecdfdbe5de54eb061.pdf",
"parts": {
"symbol": "pac5225qm.kicad_sym",
"footprint": "pac5225qm.kicad_mod",
"model_3d": "pac5225qm-hero.glb",
"model_3d_plain": "pac5225qm-etched.glb",
"model_3d_step": "pac5225qm-etched.step",
"model_3d_step_plain": "pac5225qm.step",
"lbr": "pac5225qm.lbr"
},
"distributor_links": {
"lcsc": "C431309",
"digikey": "2312-PAC5225QM-ND",
"mouser": "107-PAC5225QM"
},
"distributor_check": {
"checked_at": "2026-10-26T18:34:25Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "2312-PAC5225QM-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "107-PAC5225QM",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "PC4/AD4",
"type": "bidirectional",
"description": "I/O port C4, or ADC input 4."
},
{
"number": "2",
"name": "PC3/AD3",
"type": "bidirectional",
"description": "I/O port C3, or ADC input 3."
},
{
"number": "3",
"name": "PC2/AD2",
"type": "bidirectional",
"description": "I/O port C2, or ADC input 2."
},
{
"number": "4",
"name": "VCC33",
"type": "power_out",
"description": "Internally generated 3.3V power supply; connect a 2.2μF or higher ceramic capacitor from VCC33 to VSSA."
},
{
"number": "5",
"name": "AIO0/DA0N",
"type": "bidirectional",
"description": "Analog front end I/O 0, or differential PGA 0 negative input."
},
{
"number": "6",
"name": "AIO1/DA0P/PCMP0",
"type": "bidirectional",
"description": "Analog front end I/O 1, differential PGA 0 positive input, or protection comparator input 0."
},
{
"number": "7",
"name": "AIO2/DA1N",
"type": "bidirectional",
"description": "Analog front end I/O 2, or differential PGA 1 negative input."
},
{
"number": "8",
"name": "AIO3/DA1P/PCMP1",
"type": "bidirectional",
"description": "Analog front end I/O 3, differential PGA 1 positive input, or protection comparator input 1."
},
{
"number": "9",
"name": "AIO4/DA2N",
"type": "bidirectional",
"description": "Analog front end I/O 4, or differential PGA 2 negative input."
},
{
"number": "10",
"name": "AIO5/DA2P/PCMP2",
"type": "bidirectional",
"description": "Analog front end I/O 5, differential PGA 2 positive input, or protection comparator input 2."
},
{
"number": "11",
"name": "AIO6/AMP6/CMP6/BUF6/PBTN",
"type": "bidirectional",
"description": "Analog front end I/O 6, PGA input 6, comparator input 6, buffer output 6, or push button input."
},
{
"number": "12",
"name": "AIO7/AMP7/CMP7/PHC7",
"type": "bidirectional",
"description": "Analog front end I/O 7, PGA input 7, comparator input 7, or phase comparator input 7."
},
{
"number": "13",
"name": "AIO8/AMP8/CMP8/PHC8",
"type": "bidirectional",
"description": "Analog front end I/O 8, PGA input 8, comparator input 8, or phase comparator input 8."
},
{
"number": "14",
"name": "AIO9/AMP9/CMP9/PHC9",
"type": "bidirectional",
"description": "Analog front end I/O 9, PGA input 9, comparator input 9, or phase comparator input 9."
},
{
"number": "15",
"name": "VSYS",
"type": "power_in",
"description": "5V system power supply; connect a 4.7μF or higher ceramic capacitor from VSYS to VSSP."
},
{
"number": "16",
"name": "REGO",
"type": "power_out",
"description": "System regulator output; connect to VSYS directly or through an external power-dissipating resistor."
},
{
"number": "17",
"name": "CSM",
"type": "input",
"description": "Switching supply current sense input; connect to the positive side of the current sense resistor."
},
{
"number": "18",
"name": "VP",
"type": "power_in",
"description": "Main power supply for the power drivers and voltage feedback path of the switching supply; bypass to VSS with a bulk capacitor in parallel with a 0.1μF ceramic capacitor, with trace shorter than 10mm."
},
{
"number": "19",
"name": "VHM",
"type": "power_in",
"description": "Switching supply controller supply input; bypass to VSSP with 1μF or higher ceramic (or 0.1μF ceramic plus 10μF or higher electrolytic), with trace shorter than 10mm."
},
{
"number": "20",
"name": "DRM",
"type": "output",
"description": "Switching supply driver output; connect to the base or gate of the external power NPN or n-channel MOSFET."
},
{
"number": "21",
"name": "DRL0",
"type": "output",
"description": "Low-side gate driver 0."
},
{
"number": "22",
"name": "DRL1",
"type": "output",
"description": "Low-side gate driver 1."
},
{
"number": "23",
"name": "DRL2",
"type": "output",
"description": "Low-side gate driver 2."
},
{
"number": "24",
"name": "DRS3",
"type": "passive",
"description": "High-side gate driver source 3."
},
{
"number": "25",
"name": "DRH3",
"type": "output",
"description": "High-side gate driver 3."
},
{
"number": "26",
"name": "DRB3",
"type": "passive",
"description": "High-side gate driver bootstrap 3."
},
{
"number": "27",
"name": "DRS4",
"type": "passive",
"description": "High-side gate driver source 4."
},
{
"number": "28",
"name": "DRH4",
"type": "output",
"description": "High-side gate driver 4."
},
{
"number": "29",
"name": "DRB4",
"type": "passive",
"description": "High-side gate driver bootstrap 4."
},
{
"number": "30",
"name": "DRS5",
"type": "passive",
"description": "High-side gate driver source 5."
},
{
"number": "31",
"name": "DRH5",
"type": "output",
"description": "High-side gate driver 5."
},
{
"number": "32",
"name": "DRB5",
"type": "passive",
"description": "High-side gate driver bootstrap 5."
},
{
"number": "33",
"name": "PA7/PWMA5/PWMA7/PWMC1/CLKOUT",
"type": "bidirectional",
"description": "I/O port A7, Timer A PWM/Capture 5 or 7, Timer C PWM/Capture 1, or low-speed clock output."
},
{
"number": "34",
"name": "PD7/PWMA6/PWMD0",
"type": "bidirectional",
"description": "I/O port D7, Timer A PWM/capture 6, or Timer D PWM/capture 0."
},
{
"number": "35",
"name": "PD5/PWMA5/PWMC1",
"type": "bidirectional",
"description": "I/O port D5, Timer A PWM/capture 5, or Timer C PWM/capture 1."
},
{
"number": "36",
"name": "PD3/PWMA5/PWMA7/PWMB1",
"type": "bidirectional",
"description": "I/O port D3, Timer A PWM/capture 5 or 7, or Timer B PWM/capture 1."
},
{
"number": "37",
"name": "PD2/PWMA3/PWMA4/PWMB0",
"type": "bidirectional",
"description": "I/O port D2, Timer A PWM/capture 3 or 4, or Timer B PWM/capture 0."
},
{
"number": "38",
"name": "PD1/SWDCL/EXTCLK",
"type": "bidirectional",
"description": "I/O port D1, serial wire debug clock input, or external clock input."
},
{
"number": "39",
"name": "PD0/SWDIO",
"type": "bidirectional",
"description": "I/O port D0, or serial wire debug I/O."
},
{
"number": "40",
"name": "PE0/SPICLK",
"type": "bidirectional",
"description": "I/O port E0, or SPI clock."
},
{
"number": "41",
"name": "PE1/SPIMOSI/UARTTX",
"type": "bidirectional",
"description": "I/O port E1, SPI master out slave in (MOSI), or UART transmit output."
},
{
"number": "42",
"name": "PE2/SPIMISO/UARTRX",
"type": "bidirectional",
"description": "I/O port E2, SPI master in slave out (MISO), or UART receive input."
},
{
"number": "43",
"name": "PE3/SPICS0/nRESET1",
"type": "bidirectional",
"description": "I/O port E3, SPI chip select 0, or active-low reset input 1."
},
{
"number": "44",
"name": "PE4/SPICS1/I2CSCL",
"type": "bidirectional",
"description": "I/O port E4, SPI chip select 1, or I2C clock."
},
{
"number": "45",
"name": "PE5/SPICS2/I2CSDA",
"type": "bidirectional",
"description": "I/O port E5, SPI chip select 2, or I2C data."
},
{
"number": "46",
"name": "VCCIO",
"type": "power_out",
"description": "Internally generated digital I/O power supply; connect a 4.7μF or higher ceramic capacitor from VCCIO to VSSA."
},
{
"number": "47",
"name": "VSS",
"type": "power_in",
"description": "Ground."
},
{
"number": "48",
"name": "VCC18",
"type": "power_out",
"description": "Internally generated 1.8V core power supply; connect a 2.2μF or higher ceramic capacitor from VCC18 to VSSA."
},
{
"number": "49",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-sonnet-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin-configuration figure text is jumbled, so pin numbers were taken from the pin description tables.; Datasheet gives no electrical pin type for power pins. VCC18, VCC33 and VCCIO are classed power_out ; The datasheet refers to VSSA and VSSP as grounds, but only VSS (pin 47) and EP are listed as pins. N"
],
"pages_sent": 16,
"cost_usd": 0.2032,
"at": "2026-10-26T18:33:19"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/6a793fde3686188ecdfdbe5de54eb061.pdf",
"pages": 75,
"sha256": "ed5b9c4e7a9aa7bf",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 49,
"described": 49,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "pac5225qm.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.02,
6.02,
0.9
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "d3787e7ea8bbde43584686220ecd3c26d37088f9d7ba2cc2fab83659d526483f",
"checked": "2026-10-26",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "pac5225qm-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.02,
6.02,
0.9
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "da3cc14c01d818a6ab2dabdae7edd3eef3570153d7ef2904e33f0caba4303406",
"checked": "2026-10-26",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}