# P82B96TD

**NXP Semicon** · Signal Buffers, Repeaters, Splitters · SOIC-8

P82B96TD from NXP Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Sx | bidirectional | I2C-bus (SDA or SCL) interface pin; the maximum I2C-bus supply voltage is 15 V and the guaranteed static sink current is 3 mA. |
| 2 | Rx | input | Receive signal that pulls the I2C-bus pin Sx LOW when driven LOW; logic LOW is below 42 % of VCC and logic HIGH is above 58 % of VCC. |
| 3 | Tx | output | Transmit signal as an open-collector output that can sink a static current greater than 30 mA and may be pulled up above VCC as long as the 15 V rating is not exceeded. |
| 4 | GND | power_in | Negative supply. |
| 5 | Ty | output | Transmit signal as an open-collector output that can sink a static current greater than 30 mA and may be pulled up above VCC as long as the 15 V rating is not exceeded. |
| 6 | Ry | input | Receive signal that pulls the I2C-bus pin Sy LOW when driven LOW; logic LOW is below 42 % of VCC and logic HIGH is above 58 % of VCC. |
| 7 | Sy | bidirectional | I2C-bus (SDA or SCL) interface pin; the maximum I2C-bus supply voltage is 15 V and the guaranteed static sink current is 3 mA. |
| 8 | VCC | power_in | Positive supply voltage, specified from 2 V to 15 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | NXP Semicon |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage operating | VCC | 2 |  | 15 | V |  | 5 |
| Supply current buses HIGH | ICC |  | 0.9 | 1.8 | mA |  | 5 |
| Supply current buses HIGH at VCC = 15 V | ICC |  | 1.1 | 2.5 | mA | VCC = 15 V; buses HIGH | 5 |
| Additional quiescent supply current per Tx or Ty LOW | ΔICC |  | 1.7 | 3.5 | mA | per Tx or Ty LOW | 5 |
| Maximum input/output voltage (open-collector) | VSx, VSy |  |  | 15 | V | open-collector; I2C-bus and VRx, VRy = HIGH | 5 |
| Static output loading on I2C-bus | ISx, ISy | 0.2 |  | 3 | mA | VSx, VSy = 1.0 V; VRx, VRy = LOW | 5 |
| Dynamic output sink capability on I2C-bus | ISx, ISy | 7 | 18 |  | mA | VSx, VSy = 2 V; VRx, VRy = LOW | 5 |
| Leakage current on I2C-bus | ISx, ISy |  |  | 1 | μA | VSx, VSy = 5 V; VRx, VRy = HIGH | 5 |
| Maximum output voltage level (open-collector) | VTx, VTy |  |  | 15 | V | open-collector | 6 |
| Static output loading on buffered bus | ITx, ITy |  |  | 30 | mA | VTx, VTy = 0.4 V; VSx, VSy = LOW on I2C-bus = 0.4 V | 6 |
| Dynamic output sink capability, buffered bus | ITx, ITy | 60 | 100 |  | mA | VTx, VTy > 1 V; VSx, VSy = LOW on I2C-bus = 0.4 V | 6 |
| Output logic LOW level on normal I2C-bus | VSx, VSy | 0.8 | 0.88 | 1 | V | ISx, ISy = 3 mA; see Figure 5 | 6 |
| Output logic LOW level on normal I2C-bus | VSx, VSy | 670 | 730 | 790 | mV | ISx, ISy = 0.2 mA; see Figure 4 | 6 |
| VRx input logic HIGH level | VRx, VRy | 0.58 |  |  | fraction of applied VCC | fraction of applied VCC | 6 |
| VRx input logic LOW level | VRx, VRy |  |  | 0.42 | fraction of applied VCC | fraction of applied VCC | 6 |
| Input/output logic level difference | VSx, VSy | 50 | 85 |  | mV | VSx output LOW at 0.2 mA - VSx input HIGH maximum | 6 |
| VCC voltage at which all buses are guaranteed released | VSx, VSy, VTx, VTy |  |  | 1 | V | see Figure 8 | 7 |
| Input capacitance | Ci |  |  | 7 | pF | effective input capacitance of any signal pin measured by incremental bus rise times | 7 |
| Supply voltage | VCC | -0.3 |  | 18 | V | VCC to GND | 5 |
| Voltage on pin Sx | VSx | -0.3 |  | 18 | V | I2C-bus SDA or SCL | 5 |
| Voltage on pin Tx | VTx | -0.3 |  | 18 | V | buffered output | 5 |
| Voltage on pin Rx | VRx | -0.3 |  | 18 | V | receive input | 5 |
| Input current on any pin | In |  |  | 250 | mA | current on any pin | 5 |
| Total power dissipation | Ptot |  |  | 300 | mW | total power dissipation | 5 |
| Storage temperature | Tstg | -55 |  | 125 | °C | storage temperature | 5 |
| Ambient temperature operating | Tamb | -40 |  | 85 | °C | ambient temperature operating | 5 |

## CAD (KiCad official)

- Symbol: `P82B96TD`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `p82b96td-etched.step` / `p82b96td-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `p82b96td.step` / `p82b96td.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [NXP Semicon datasheet](https://www.nxp.com/docs/en/data-sheet/P82B96TD.pdf) (32 pp, sha256 `8b34c190627f646a`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/p82b96td-datasheet.pdf)