# P4SMFJ5.0CA

**Leiditech** · ESD And Surge Protection (TVS/ESD) · SOD-123FL

P4SMFJ5.0CA from Leiditech, in a SOD-123FL. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | passive | Cathode: the banded/marked end per the datasheet; pad 1 of the KiCad diode footprint. |
| 2 | A | passive | Anode. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Leiditech |
| Package | SOD-123FL |
| Category | Circuit Protection |
| Pins | 2 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Breakdown voltage, minimum | VBR | 6.4 |  |  | V | IT = 10 mA (5.0CA row) | 3 |
| Breakdown voltage, maximum | VBR |  |  | 7.25 | V | IT = 10 mA (5.0CA row) | 3 |
| Reverse leakage current (IR column, 5.0CA row) | IR |  |  | 800 | µA |  | 3 |
| Clamping voltage (Vc column, 5.0CA row) | Vc |  |  | 9.2 | v | at Ipp = 43.48 A | 3 |
| Peak pulse power dissipation | PPPM |  |  | 400 | W | TA=25℃, 10x1000μs waveform (Fig.2)(Note 1)(Note 2) | 2 |
| Power dissipation on infinite heat sink | PD |  |  | 6.5 | W | TA=50℃ | 2 |
| Operating junction and storage temperature range | TJ, TSTG | -55 |  | 150 | ℃ |  | 2 |
| Typical thermal resistance junction to lead | RuJL |  | 15 |  | ℃/W |  | 2 |
| Typical thermal resistance junction to ambient | RuJA |  | 75 |  | ℃/W |  | 2 |
| Reverse stand-off voltage (VRWM column, 5.0CA row) | VRWM |  | 5 |  | V |  | 3 |

## CAD (KiCad official)

- Symbol: `P4SMFJ5.0CA`
- Footprint: `Diode_SMD:D_SOD-123F`
- 3D model: SOD-123FL (KiCad packages3D, STEP)
- 3D model files: `p4smfj5-0ca-etched.step` / `p4smfj5-0ca-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `p4smfj5-0ca.step` / `p4smfj5-0ca.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Leiditech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588942989255184384) (7 pp, sha256 `355cff322eadb46d`, retrieved 2026-10-14, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins`, primary `cathode-band convention` (convention), consensus `off` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/p4smfj5-0ca-datasheet.pdf)