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Ray Publish 0.1.0 ffe422e 12d ago

P4KE39CAHR0G-CN

ChipNobo · ESD And Surge Protection (TVS/ESD) · DO-41

P4KE39CAHR0G-CN from ChipNobo, in a DO-41. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 K passive Cathode: the banded/marked end per the datasheet; pad 1 of the KiCad diode footprint.
2 A passive Anode.

Key specifications

Parameter Value
Manufacturer ChipNobo
Package DO-41
Category Circuit Protection
Pins 2

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Breakdown voltage (min) VBR 37.05 40.95 V @IT = 1 mA 3
Maximum reverse leakage current IR 1 uA @VRWM 3
Working peak reverse voltage VRWM 33.3 V 3
Maximum reverse surge current IPP 7.42 A 3
Maximum clamping voltage VC 53.9 V @IPP 3
Breakdown voltage tolerance (A suffix, 5% device) VBR -5 5 % Suffix 'A' denotes 5% tolerance device (per note 1) 3
Peak power dissipation PPP 400 W 10/1000 μs waveform (note 1) 1
Power dissipation on infinite heatsink PD 1 W TL = 75 °C 1
Operating junction and storage temperature range TJ, TSTG -55 150 °C 1

CAD (KiCad official)

  • Symbol: P4KE39CAHR0G-CN
  • Footprint: Diode_THT:D_DO-41_SOD81_P10.16mm_Horizontal
  • 3D model: DO-41 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ChipNobo datasheet (5 pp, sha256 6617d82a7af2fb35, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins, primary cathode-band convention (convention), consensus off (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF