component
P25D22H-SSH-IT
Public Made by Adomby adom
PUYA) NOR FLASH, SOP-8-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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P25D22H-SSH-IT
PUYA) · NOR FLASH · SOP-8-150mil
P25D22H-SSH-IT from PUYA), in a SOP-8-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS# | input | Chip select input for the serial interface, listed in the pin descriptions as 'Chip select' with no further limits stated. |
| 2 | SO | bidirectional | Serial data output for 1 x I/O (SIO1), and serial data input and output for 2 x I/O read mode. |
| 3 | WP# | input | Write protection, active low; it provides hardware controlled locking of protected sectors. |
| 4 | GND | power_in | Ground of the device. |
| 5 | SI | bidirectional | Serial data input for 1 x I/O (SIO0), and serial data input and output for 2 x I/O read mode. |
| 6 | SCLK | input | Serial interface clock input, with SPI Mode 0 and Mode 3 supported. |
| 7 | NC | unconnected | Not connected. |
| 8 | VCC | power_in | Power supply of the device, specified at 2.3 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PUYA) |
| Package | SOP-8-150mil |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | -65 | 150 | °C | 7 | |||
| Operation Temperature | -25 | 85 | °C | 7 | |||
| Maximum Operation Voltage | 4 | V | 7 | ||||
| Voltage on Any Pin with respect to Ground | -0.6 | 4.1 | V | 7 | |||
| DC Output Current | 5 | mA | 7 | ||||
| Output Capacitance | COUT | 8 | pF | VOUT=GND | 7 | ||
| Input Capacitance | CIN | 6 | pF | VIN=GND | 7 | ||
| Deep power down current | IDPD | 0.2 | 2 | uA | CS#=Vcc, all other inputs at 0V or Vcc | 8 | |
| Standby current | ISB | 12 | 20 | uA | CS#, WP#=VIH all inputs at CMOS levels | 8 | |
| Low power read current (03h) | ICC1 | 0.5 | 1 | mA | f=1MHz; IOUT=0mA | 8 | |
| Low power read current (03h) | ICC1 | 0.8 | 1.5 | mA | f=33MHz; IOUT=0mA | 8 | |
| Read current (0Bh) | ICC2 | 1 | 2 | mA | f=50MHz; IOUT=0mA | 8 | |
| Read current (0Bh) | ICC2 | 1.5 | 2.5 | mA | f=85MHz; IOUT=0mA | 8 | |
| Program current | ICC3 | 2 | 3 | mA | CS#=Vcc | 8 | |
| Erase current | ICC4 | 2 | 3 | mA | CS#=Vcc | 8 | |
| Input load current | ILI | 1 | uA | All inputs at CMOS level | 8 | ||
| Output leakage | ILO | 1 | uA | All inputs at CMOS level | 8 | ||
| Output low voltage | VOL | 0.2 | V | IOL=100uA | 8 | ||
| Clock Frequency for FAST_READ, PP, SE, BE32K, BE, CE, DP, RES, WREN, WRDI, RDID, RDSR, RDCR, WRSR, WRCR, RUID | fSCLK | 85 | MHz | FAST_READ, PP, SE, BE32K, BE, CE, DP, RES, WREN, WRDI, RDID, RDSR, RDCR, WRSR, WRCR, RUID | 9 | ||
| Clock Frequency for READ instruction | fRSCLK | 40 | MHz | READ instruction | 9 | ||
| Clock Frequency for DREAD instructions and 2READ instructions | fTSCLK | 85 | MHz | DREAD instructions and 2READ instructions with 8 dummy CLK | 9 | ||
| Clock Frequency for 2READ instructions | fQ | 70 | MHz | 2READ instructions with 4 dummy CLK | 9 | ||
| Clock High Time for READ instruction | tCH | 11 | ns | READ instruction | 9 | ||
| Clock High Time | tCH | 5 | ns | 9 | |||
| Clock Low Time for READ instruction | tCL | 11 | ns | READ instruction | 9 | ||
| Clock Low Time (fSCLK) | tCL | 5 | ns | fSCLK | 9 | ||
| CS# Active Setup Time (relative to SCLK) | tSLCH | 5 | ns | 9 | |||
| CS# Not Active Hold Time (relative to SCLK) | tCHSL | 5 | ns | 9 | |||
| Data In Setup Time | tDVCH | 2 | ns | 9 | |||
| Data In Hold Time | tCHDX | 3 | ns | 9 | |||
| CS# Active Hold Time (relative to SCLK) | tCHSH | 5 | ns | 9 | |||
| CS# Not Active Setup Time (relative to SCLK) | tSHCH | 5 | ns | 9 | |||
| CS# Deselect Time From Read to next Read | tSHSL | 20 | ns | From Read to next Read | 9 | ||
| CS# Deselect Time From Write, Erase, Program to Read Status Register | tSHSL | 30 | ns | From Write, Erase, Program to Read Status Register | 9 | ||
| Output Disable Time | tSHQZ | 6 | ns | 9 | |||
| Clock Low to Output Valid Loading 30pF | tCLQV | 7 | ns | Loading 30pF | 9 | ||
| Clock Low to Output Valid Loading 15pF | tCLQV | 6 | ns | Loading 15pF | 9 | ||
| Output Hold Time | tCLQX | 0 | ns | 9 | |||
| Write Protect Setup Time | tWHSL | 20 | ns | 9 | |||
| Write Protect Hold Time | tSHWL | 100 | ns | 9 | |||
| CS# High to Deep Power-down Mode | tDP | 3 | us | 9 | |||
| CS# High To Standby Mode Without Electronic Signature Read | tRES1 | 8 | us | 9 | |||
| CS# High To Standby Mode With Electronic Signature Read | tRES2 | 8 | us | 9 | |||
| Write Status Register Cycle Time | tW | 8 | 12 | ms | 9 | ||
| Reset recovery time (for erase/program operation except WRSR) | tReady | 30 | us | for erase/program operation except WRSR | 9 | ||
| Reset recovery time (for WRSR operation) | tReady | 8 | 12 | ms | for WRSR operation | 9 | |
| Page program time (up to 256 bytes) | tPP | 2 | 3 | ms | 10 | ||
| Page erase time | tPE | 12 | 20 | ms | 10 | ||
| Sector erase time | tSE | 12 | 20 | ms | 10 | ||
| Block erase time for 32K bytes | tBE1 | 12 | 20 | ms | 10 | ||
| Block erase time for 64K bytes | tBE2 | 12 | 20 | ms | 10 | ||
| Chip erase time | tCE | 12 | 20 | ms | 10 | ||
| Supply voltage (Read, Erase and Program) | Vcc | 2.3 | 3.6 | V | Single supply, read, erase and program | 3 | |
| Operating temperature range (Industrial) | -25 | 85 | °C | 3 |
CAD (KiCad official)
- Symbol:
P25D22H-SSH-IT - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8-150mil (KiCad packages3D, STEP)
- 3D model files:
p25d22h-ssh-it-etched.step/p25d22h-ssh-it-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);p25d22h-ssh-it.step/p25d22h-ssh-it.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PUYA) datasheet (47 pp, sha256
975b1ce571dc3593, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# P25D22H-SSH-IT
**PUYA)** · NOR FLASH · SOP-8-150mil
P25D22H-SSH-IT from PUYA), in a SOP-8-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS# | input | Chip select input for the serial interface, listed in the pin descriptions as 'Chip select' with no further limits stated. |
| 2 | SO | bidirectional | Serial data output for 1 x I/O (SIO1), and serial data input and output for 2 x I/O read mode. |
| 3 | WP# | input | Write protection, active low; it provides hardware controlled locking of protected sectors. |
| 4 | GND | power_in | Ground of the device. |
| 5 | SI | bidirectional | Serial data input for 1 x I/O (SIO0), and serial data input and output for 2 x I/O read mode. |
| 6 | SCLK | input | Serial interface clock input, with SPI Mode 0 and Mode 3 supported. |
| 7 | NC | unconnected | Not connected. |
| 8 | VCC | power_in | Power supply of the device, specified at 2.3 V to 3.6 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PUYA) |
| Package | SOP-8-150mil |
| Category | Memory |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | | -65 | | 150 | °C | | 7 |
| Operation Temperature | | -25 | | 85 | °C | | 7 |
| Maximum Operation Voltage | | | | 4 | V | | 7 |
| Voltage on Any Pin with respect to Ground | | -0.6 | | 4.1 | V | | 7 |
| DC Output Current | | | | 5 | mA | | 7 |
| Output Capacitance | COUT | | | 8 | pF | VOUT=GND | 7 |
| Input Capacitance | CIN | | | 6 | pF | VIN=GND | 7 |
| Deep power down current | IDPD | | 0.2 | 2 | uA | CS#=Vcc, all other inputs at 0V or Vcc | 8 |
| Standby current | ISB | | 12 | 20 | uA | CS#, WP#=VIH all inputs at CMOS levels | 8 |
| Low power read current (03h) | ICC1 | | 0.5 | 1 | mA | f=1MHz; IOUT=0mA | 8 |
| Low power read current (03h) | ICC1 | | 0.8 | 1.5 | mA | f=33MHz; IOUT=0mA | 8 |
| Read current (0Bh) | ICC2 | | 1 | 2 | mA | f=50MHz; IOUT=0mA | 8 |
| Read current (0Bh) | ICC2 | | 1.5 | 2.5 | mA | f=85MHz; IOUT=0mA | 8 |
| Program current | ICC3 | | 2 | 3 | mA | CS#=Vcc | 8 |
| Erase current | ICC4 | | 2 | 3 | mA | CS#=Vcc | 8 |
| Input load current | ILI | | | 1 | uA | All inputs at CMOS level | 8 |
| Output leakage | ILO | | | 1 | uA | All inputs at CMOS level | 8 |
| Output low voltage | VOL | | | 0.2 | V | IOL=100uA | 8 |
| Clock Frequency for FAST_READ, PP, SE, BE32K, BE, CE, DP, RES, WREN, WRDI, RDID, RDSR, RDCR, WRSR, WRCR, RUID | fSCLK | | | 85 | MHz | FAST_READ, PP, SE, BE32K, BE, CE, DP, RES, WREN, WRDI, RDID, RDSR, RDCR, WRSR, WRCR, RUID | 9 |
| Clock Frequency for READ instruction | fRSCLK | | | 40 | MHz | READ instruction | 9 |
| Clock Frequency for DREAD instructions and 2READ instructions | fTSCLK | | | 85 | MHz | DREAD instructions and 2READ instructions with 8 dummy CLK | 9 |
| Clock Frequency for 2READ instructions | fQ | | | 70 | MHz | 2READ instructions with 4 dummy CLK | 9 |
| Clock High Time for READ instruction | tCH | 11 | | | ns | READ instruction | 9 |
| Clock High Time | tCH | 5 | | | ns | | 9 |
| Clock Low Time for READ instruction | tCL | 11 | | | ns | READ instruction | 9 |
| Clock Low Time (fSCLK) | tCL | 5 | | | ns | fSCLK | 9 |
| CS# Active Setup Time (relative to SCLK) | tSLCH | 5 | | | ns | | 9 |
| CS# Not Active Hold Time (relative to SCLK) | tCHSL | 5 | | | ns | | 9 |
| Data In Setup Time | tDVCH | 2 | | | ns | | 9 |
| Data In Hold Time | tCHDX | 3 | | | ns | | 9 |
| CS# Active Hold Time (relative to SCLK) | tCHSH | 5 | | | ns | | 9 |
| CS# Not Active Setup Time (relative to SCLK) | tSHCH | 5 | | | ns | | 9 |
| CS# Deselect Time From Read to next Read | tSHSL | 20 | | | ns | From Read to next Read | 9 |
| CS# Deselect Time From Write, Erase, Program to Read Status Register | tSHSL | 30 | | | ns | From Write, Erase, Program to Read Status Register | 9 |
| Output Disable Time | tSHQZ | | | 6 | ns | | 9 |
| Clock Low to Output Valid Loading 30pF | tCLQV | | | 7 | ns | Loading 30pF | 9 |
| Clock Low to Output Valid Loading 15pF | tCLQV | | | 6 | ns | Loading 15pF | 9 |
| Output Hold Time | tCLQX | 0 | | | ns | | 9 |
| Write Protect Setup Time | tWHSL | 20 | | | ns | | 9 |
| Write Protect Hold Time | tSHWL | 100 | | | ns | | 9 |
| CS# High to Deep Power-down Mode | tDP | 3 | | | us | | 9 |
| CS# High To Standby Mode Without Electronic Signature Read | tRES1 | 8 | | | us | | 9 |
| CS# High To Standby Mode With Electronic Signature Read | tRES2 | 8 | | | us | | 9 |
| Write Status Register Cycle Time | tW | | 8 | 12 | ms | | 9 |
| Reset recovery time (for erase/program operation except WRSR) | tReady | 30 | | | us | for erase/program operation except WRSR | 9 |
| Reset recovery time (for WRSR operation) | tReady | | 8 | 12 | ms | for WRSR operation | 9 |
| Page program time (up to 256 bytes) | tPP | | 2 | 3 | ms | | 10 |
| Page erase time | tPE | | 12 | 20 | ms | | 10 |
| Sector erase time | tSE | | 12 | 20 | ms | | 10 |
| Block erase time for 32K bytes | tBE1 | | 12 | 20 | ms | | 10 |
| Block erase time for 64K bytes | tBE2 | | 12 | 20 | ms | | 10 |
| Chip erase time | tCE | | 12 | 20 | ms | | 10 |
| Supply voltage (Read, Erase and Program) | Vcc | 2.3 | | 3.6 | V | Single supply, read, erase and program | 3 |
| Operating temperature range (Industrial) | | -25 | | 85 | °C | | 3 |
## CAD (KiCad official)
- Symbol: `P25D22H-SSH-IT`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8-150mil (KiCad packages3D, STEP)
- 3D model files: `p25d22h-ssh-it-etched.step` / `p25d22h-ssh-it-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `p25d22h-ssh-it.step` / `p25d22h-ssh-it.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [PUYA) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8756476206403735552) (47 pp, sha256 `975b1ce571dc3593`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/p25d22h-ssh-it-datasheet.pdf)