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Contents

README

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OPZ202BSOIC8

analogysemi · Operational Amplifier · SOIC-8

OPZ202BSOIC8 from analogysemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection; the datasheet states it can be left floating.
2 -IN input Negative (inverting) input; the common-mode range is V- to (V+) - 1.5 V, and input signals more than 0.5 V beyond the supply rails must be current-limited to 10 mA or less.
3 +IN input Positive (non-inverting) input; the common-mode range is V- to (V+) - 1.5 V, and input signals more than 0.5 V beyond the supply rails must be current-limited to 10 mA or less.
4 V- power_in Negative (lowest) power supply; split supply is ±2.25 V to ±20 V and single supply is 4.5 V to 40 V.
5 NC unconnected No internal connection; the datasheet states it can be left floating.
6 OUT output Amplifier output with rail-to-rail swing (typically 5 mV to 15 mV from the rail with no load and 100 mV to 200 mV with a 10 kΩ load), with short-circuit to ground, V-, or V+ specified as continuous.
7 V+ power_in Positive (highest) power supply; the absolute maximum is 40 V single supply (±20 V split), and operation requires a supply greater than 4.5 V (±2.25 V).
8 NC unconnected No internal connection; the datasheet states it can be left floating.

Key specifications

Parameter Value
Manufacturer analogysemi
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VOS -10 1.7 10 μV 6
Input Offset Voltage Drift -0.2 0.03 0.2 μV/°C TA = -40°C to 125°C 6
Power-Supply Rejection Ratio PSRR -0.25 0.05 0.25 μV/V VS = 4.5V to 40V, TA = -40°C to 125°C 6
Input Bias Current IB -1000 100 1000 pA VCM = VS / 2 6
Input Bias Current IB -15 15 nA TA = -40°C to 125°C 6
Input Offset Current IOS -2500 250 2500 pA 6
Input Offset Current IOS -6 6 nA TA = -40°C to 125°C 6
Common-Mode Rejection Ratio CMRR 135 153 dB (V-) < VCM < (V+), 1.5V 6
Common-Mode Rejection Ratio CMRR 136 149 dB (V-) + 0.5V < VCM < (V+), 1.5V, VS = ±20V 6
Common-Mode Rejection Ratio CMRR 133 dB (V-) + 0.5V < VCM < (V+), 1.5V, VS = ±20V, TA = -40°C to 125°C 6
Open-Loop Voltage Gain AOL 135 164 dB (V-) + 0.5V < VO < (V+), 0.5V 6
Open-Loop Voltage Gain AOL 128 dB (V-) + 0.5V < VO < (V+), 0.5V, TA = -40°C to 125°C 6
Voltage Output Swing from Rail 5 15 mV No load 7
Voltage Output Swing from Rail 100 200 mV RL = 10kΩ 7
Voltage Output Swing from Rail 260 mV TA = -40°C to 125°C 7
Capacitive Load Drive CLOAD 1 nF 7
Quiescent Current per Amplifier IQ 300 362 μA VS = ±4.5V to VS = ±20V 7
Quiescent Current per Amplifier IQ 420 μA IO = 0mA, TA = -40°C to 125°C 7
Operating Voltage Range (split supply) 2.25 20 V Split supply 5
Operating Voltage Range (single supply) 4.5 40 V Single supply 5
Specified Temperature Range -40 125 °C 5
Supply Voltage (split) 2.25 20 V 4
Supply Voltage (single) 4.5 40 V 4
Differential Signal Input Voltage -0.7 0.7 V 4
Signal Input Pins Current -10 10 mA 4
Operating Temperature TA -40 125 °C 4
Junction Temperature TJ 150 °C 4
Storage Temperature Tstg -65 150 °C 4
Long-Term Stability 4 μV 6
Input Voltage Noise en 360 nVP-P f = 0.1Hz to 10Hz 6
Input Voltage Noise en 55 nVrms f = 0.1Hz to 10Hz 6
Input Voltage Noise Density en 17.6 nV/√Hz f = 1kHz 6
Input Current Noise Density in 214 fA/√Hz f = 1kHz 6
Gain-Bandwidth Product GBW 1 MHz 6
Slew Rate SR 2.8 V/μs G = 1 6
Settling Time (0.1%) tS 10 μs VS = ±20V, G = 1, 10V step 6
Settling Time (0.01%) tS 50 μs VS = ±20V, G = 1, 10V step 6
Overload Recovery Time tOR 1 μs VIN × G = VS 6
Open-Loop Output Resistance RO 120 Ω f = 1MHz, IO = 0 7
Short-Circuit Current, sinking ISC -20 mA 7
Short-Circuit Current, sourcing ISC 29 mA 7
Junction-to-Ambient Thermal Resistance RθJA 90.6 °C/W SOIC-8 package 5
Junction-to-Board Thermal Resistance RθJB 47.6 °C/W SOIC-8 package 5
Junction-to-Top Characterization Parameter ψJT 3.6 °C/W SOIC-8 package 5
Junction-to-Board Characterization Parameter ψJB 47 °C/W SOIC-8 package 5
Junction-to-Case (Top) Thermal Resistance RθJC(top) 35 °C/W SOIC-8 package 5
Junction-to-Case (Bottom) Thermal Resistance RθJC(bot) 50.8 °C/W SOIC-8 package 5

CAD (KiCad official)

  • Symbol: OPZ202BSOIC8
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: opz202bsoic8-etched.step / opz202bsoic8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); opz202bsoic8.step / opz202bsoic8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: analogysemi datasheet (22 pp, sha256 d29cc6d0b60f42c8, retrieved 2026-10-16, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF