# OPA842IDR

**Texas Instruments** · Pre-ordered Chips · SOIC-8

OPA842IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection. |
| 2 | Inverting Input | input | Inverting input of the voltage-feedback op amp, with differential input voltage limited to ±1.2V and input voltage range of ±VS. |
| 3 | Noninverting Input | input | Noninverting input of the op amp, with differential input voltage limited to ±1.2V and input voltage range of ±VS. |
| 4 | -VS | power_in | Negative power supply; total supply is limited to ±6.5VDC absolute maximum. |
| 5 | NC | unconnected | No connection. |
| 6 | Output | output | Op amp output pin. |
| 7 | +VS | power_in | Positive power supply; total supply is limited to ±6.5VDC absolute maximum. |
| 8 | NC | unconnected | No connection. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power Supply (absolute max) | VS |  |  | 6.5 | V | ±6.5 VDC | 2 |
| Differential Input Voltage |  | -1.2 |  | 1.2 | V | ±1.2 V | 2 |
| Storage Temperature Range | Tstg | -65 |  | 125 | °C | D, DBV | 2 |
| Junction Temperature | TJ |  |  | 175 | °C |  | 2 |
| ESD HBM |  |  |  | 2000 | V | Human Body Model | 2 |
| ESD CDM |  |  |  | 1500 | V | Charge Device Model | 2 |
| ESD MM |  |  |  | 200 | V | Machine Model | 2 |
| Closed-Loop Bandwidth G=+2 |  | 105 | 150 |  | MHz | G = +2, +25°C min (0 to 70°C: 101, -40 to 85°C: 100) | 3 |
| Closed-Loop Bandwidth G=+5 |  | 30 | 45 |  | MHz | G = +5 | 3 |
| Closed-Loop Bandwidth G=+10 |  | 15 | 21 |  | MHz | G = +10 | 3 |
| Gain-Bandwidth Product | GBP | 136 | 200 |  | MHz |  | 3 |
| Second Harmonic RL=100Ω |  |  | -80 | -78 | dBc | G = +2, f = 5MHz, VO = 2VPP, RL = 100Ω | 3 |
| Second Harmonic RL=500Ω |  |  | -94 | -92 | dBc | G = +2, f = 5MHz, VO = 2VPP, RL = 500Ω | 3 |
| Third Harmonic RL=100Ω |  |  | -97 | -96 | dBc | G = +2, f = 5MHz, VO = 2VPP, RL = 100Ω | 3 |
| Third Harmonic RL=500Ω |  |  | -93 | -91 | dBc | G = +2, f = 5MHz, VO = 2VPP, RL = 500Ω | 3 |
| Input Voltage Noise |  |  | 2.6 | 2.8 | nV/√Hz | f > 1MHz | 3 |
| Input Current Noise |  |  | 2.7 | 2.8 | pA/√Hz | f > 1MHz | 3 |
| Rise and Fall Time |  |  | 2.3 | 3.3 | ns | 0.2V Step | 3 |
| Slew Rate |  | 300 | 400 |  | V/ms | 2V Step | 3 |
| Settling Time to 0.1% |  |  | 15 | 19.6 | ns | 2V Step | 3 |
| Settling Time to 1.0% |  |  | 9 | 10.2 | ns | 2V Step | 3 |
| Open-Loop Voltage Gain | AOL | 100 | 110 |  | dB | VO = 0V | 3 |
| Input Offset Voltage |  | -1.2 | 0.3 | 1.2 | mV | VCM = 0V | 3 |
| Average Offset Voltage Drift |  |  | 4 | 4 | mV/°C | VCM = 0V | 3 |
| Input Bias Current |  |  | -20 | -35 | mA | VCM = 0V | 3 |
| Input Bias Current Drift |  |  |  | 25 | nA/°C | VCM = 0V | 3 |
| Input Offset Current |  | -1 | 0.35 | 1 | mA | VCM = 0V | 3 |
| Input Offset Current Drift |  | -2 |  | 2 | nA/°C | VCM = 0V | 3 |
| Common-Mode Input Range | CMIR | 3 | 3.2 |  | V | ±, +25°C | 3 |
| Common-Mode Rejection Ratio | CMRR | 85 | 95 |  | dB | VCM = ±1V, Input-Referred | 3 |
| Output Voltage Swing Positive |  | 3 | 3.2 |  | V | RL > 1kΩ, Positive Output | 4 |
| Output Voltage Swing Negative |  | -3.5 | -3.7 |  | V | RL > 1kΩ, Negative Output | 4 |
| Output Voltage Swing Positive |  | 2.8 | 3 |  | V | RL = 100Ω, Positive Output | 4 |
| Output Voltage Swing Negative |  | -3.3 | -3.5 |  | V | RL = 100Ω, Negative Output | 4 |
| Current Output, Sourcing |  | 90 | 100 |  | mA | VO = 0V | 4 |
| Maximum Operating Voltage |  | 6 |  |  | V | ± | 4 |
| Maximum Quiescent Current | IQ |  | 20.2 | 20.8 | mA | VS = ±5V | 4 |
| Minimum Quiescent Current | IQ | 19.6 | 20.2 |  | mA | VS = ±5V | 4 |
| Power-Supply Rejection Ratio | PSRR | 90 | 100 |  | dB | /VS/ = 4.5V to 5.5V, Input-Referred | 4 |
| Specified Operating Voltage |  |  | 5 |  | V | ± | 4 |
| Minimum Operating Voltage |  |  | 3.5 |  | V | ± | 4 |
| Specified Operating Range |  | -40 |  | 85 | °C | D, DBV | 4 |
| Thermal Resistance Junction-to-Ambient | θJA |  | 125 |  | °C/W | D, SO-8 | 4 |

## CAD (KiCad official)

- Symbol: `OPA842IDR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `opa842idr-etched.step` / `opa842idr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `opa842idr.step` / `opa842idr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/opa842.pdf) (32 pp, sha256 `257d4d5b34fe304f`, retrieved 2026-10-31, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/opa842idr-datasheet.pdf)