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OPA4323IPWR

Texas Instruments · Operational Amplifier · TSSOP-14

OPA4323IPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	OUT1	output	Output of channel 1.
2	IN1-	input	Inverting input of channel 1.
3	IN1+	input	Noninverting input of channel 1.
4	V+	power_in	Positive (high) supply, rated 1.7V to 5.5V total supply (V+ to V-) with 7.0V absolute maximum; bypass with a 0.1µF low-ESR ceramic capacitor.
5	IN2+	input	Noninverting input of channel 2.
6	IN2-	input	Inverting input of channel 2.
7	OUT2	output	Output of channel 2.
8	OUT3	output	Output of channel 3.
9	IN3-	input	Inverting input of channel 3.
10	IN3+	input	Noninverting input of channel 3.
11	V-	power_in	Negative (low) supply or ground for single-supply operation.
12	IN4+	input	Noninverting input of channel 4.
13	IN4-	input	Inverting input of channel 4.
14	OUT4	output	Output of channel 4.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-14
Category	Amplifiers/Comparators
Pins	14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input offset voltage	VOS	-1.25	0.15	1.25	mV	VS = 1.8V to 5.5V	11
Input offset voltage, over temperature	VOS	-1.35		1.35	mV	VS = 1.8V to 5.5V, TA = -40°C to 125°C	11
Input offset voltage drift	dVOS/dT	-1.8	0.4	1.8	µV/°C	VS = 1.8V to 5.5V, TA = -40°C to 125°C	11
Power supply rejection ratio	PSRR	-20	5	20	µV/V	VS = 1.8V to 5.5V	11
Input bias current	IB	-20	0.5	20	pA	VS = 1.8V to VS = 5V	11
Input bias current, over temperature	IB	-1600		1600	pA	VS = 1.8V to VS = 5V, TA = -40°C to 125°C	11
Input offset current, over temperature	IOS	-120		120	pA	VS = 1.8V to VS = 5V, TA = -40°C to 125°C	11
Common-mode rejection ratio	CMRR	100	114		dB	VS = 5.5V, (V-), 0.2V ≤ VCM ≤ (V+) + 0.10V	11
Common-mode rejection ratio	CMRR	90	104		dB	VS = 5.5V, (V-), 0.2V ≤ VCM ≤ (V+) + 0.15V	11
Common-mode rejection ratio, over temperature	CMRR	84			dB	VS = 5.5V, (V-), 0.2V ≤ VCM ≤ (V+) + 0.15V, TA = -40°C to 125°C	11
Common-mode rejection ratio	CMRR	85	103		dB	VS = 1.8V, (V-), 0.1V ≤ VCM ≤ (V+) + 0.05V	11
Common-mode rejection ratio, over temperature	CMRR	80			dB	VS = 1.8V, (V-), 0.1V ≤ VCM ≤ (V+) + 0.05V, TA = -40°C to 125°C	11
Open-loop voltage gain	AOL	103	120		dB	VS = 1.8V, (V-) + 0.1V < VO < (V+), 0.1V, RL = 10kΩ to VS/2	11
Open-loop voltage gain	AOL	100	115		dB	VS = 1.8V, (V-) + 0.2V < VO < (V+), 0.2V, RL = 2kΩ to VS/2	11
Open-loop voltage gain	AOL	112	125		dB	VS = 5.5V, (V-) + 0.1V < VO < (V+), 0.1V, RL = 10kΩ to VS/2	11
Open-loop voltage gain	AOL	108	120		dB	VS = 5.5V, (V-) + 0.2V < VO < (V+), 0.2V, RL = 2kΩ to VS/2	11
Output voltage swing from rail	Vo		15	25	mV	VS = 1.8V, RL = 10kΩ to VS/2	12
Output voltage swing from rail	Vo		25	35	mV	VS = 5.5V, RL = 10kΩ to VS/2	12
Output voltage swing from rail	Vo		45	55	mV	VS = 5.5V, RL = 2kΩ to VS/2	12
Short-circuit current	ISC	-20	-40		mA	VS = 1.8V; printed as ±20 min, ±40 typ (average of source and sink)	12
Short-circuit current	ISC	-80	-110		mA	VS = 5.5V; printed as ±80 min, ±110 typ (average of source and sink)	12
Quiescent current per amplifier	IQ		1.6	1.9	mA	VS = 5.5V, IO = 0A	12
Quiescent current per amplifier, over temperature	IQ			2	mA	TA = -40°C to 125°C	12
Thermal resistance, junction to ambient	RθJA		115.8		°C/W	PW (TSSOP) 14 pin	10
Thermal resistance, junction to case (top)	RθJC(top)		44.9		°C/W	PW (TSSOP) 14 pin	10
Thermal resistance, junction to board	RθJB		58.7		°C/W	PW (TSSOP) 14 pin	10
Junction-to-top characterization parameter	ψJT		5.2		°C/W	PW (TSSOP) 14 pin	10
Junction-to-board characterization parameter	ψJB		58.1		°C/W	PW (TSSOP) 14 pin	10
Input offset current	IOS		0.25		pA	VS = 1.8V to VS = 5V	11
Gain bandwidth product	GBW		20		MHz	VS = 5.5V, G = +1, RL = 10kΩ, CL = 100pF, TA = 25°C	11
Slew rate	SR		33		V/μs	VS = 5.5V, G = +1, VSTEP = 5V, RL = 10kΩ, CL = 100pF	11
Phase margin	PM		50		°	VS = 5.5V, G = +1, RL = 10kΩ, CL = 30pF	12

CAD (KiCad official)

Symbol: OPA4323IPWR
Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
3D model: TSSOP-14 (KiCad packages3D, STEP)
3D model files: opa4323ipwr-etched.step / opa4323ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); opa4323ipwr.step / opa4323ipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (66 pp, sha256 169024129fdfe69f, retrieved 2026-10-22, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF