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OPA4197QPWRQ1

Texas Instruments · Operational Amplifier · TSSOP-14

OPA4197QPWRQ1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Output of channel A.
2 -IN A input Inverting input of channel A.
3 +IN A input Noninverting input of channel A.
4 V+ power_in Positive (highest) power supply.
5 +IN B input Noninverting input of channel B.
6 -IN B input Inverting input of channel B.
7 OUT B output Output of channel B.
8 OUT C output Output of channel C.
9 -IN C input Inverting input of channel C.
10 +IN C input Noninverting input of channel C.
11 V- power_in Negative (lowest) power supply.
12 +IN D input Noninverting input of channel D.
13 -IN D input Inverting input of channel D.
14 OUT D output Output of channel D.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Operational Amplifier/Comparator
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage, single supply VS 40 V Single supply, VS = (V+) 6
Supply voltage, dual supply VS 20 V Dual supply, VS = (V+), (V-) 6
Signal input current -10 10 mA 6
Operating temperature (absolute maximum) TA -55 150 °C 6
Junction temperature TJ 150 °C 6
Storage temperature Tstg -65 150 °C 6
Supply voltage, single supply (recommended) VS 4.5 36 V Single supply, VS = (V+) 6
Supply voltage, dual supply (recommended) VS 2.25 18 V Dual supply, VS = (V+), (V-) 6
Operating temperature (recommended) TA -40 125 °C 6
Junction-to-ambient thermal resistance, PW (TSSOP) RθJA 108.1 °C/W 7
Junction-to-case(top) thermal resistance, PW (TSSOP) RθJC(top) 26.3 °C/W 7
Junction-to-board thermal resistance, PW (TSSOP) RθJB 54.4 °C/W 7
Junction-to-top characterization parameter, PW (TSSOP) ψJT 1.4 °C/W 7
Junction-to-board characterization parameter, PW (TSSOP) ψJB 53.3 °C/W 7
Input offset voltage VOS -250 25 250 µV 8
Input offset voltage VOS -350 30 350 µV TA = 0°C to 85°C 8
Input offset voltage VOS -400 50 400 µV TA = -40°C to +125°C 8
Input offset voltage VOS -250 10 250 µV VCM = (V+), 1.5 V 8
Input offset voltage drift dVOS/dT -2.5 0.5 2.5 µV/°C TA = 0°C to 85°C 8
Input offset voltage drift dVOS/dT -4.5 0.8 4.5 µV/°C TA = -40°C to +125°C 8
Power-supply rejection ratio PSRR -1 0.3 1 µV/V TA = -40°C to +125°C 8
Input bias current IB -20 5 20 pA 8
Input bias current IB -5 5 nA TA = -40°C to +125°C 8
Input offset current IOS -20 2 20 pA 8
Input offset current IOS -2 2 nA TA = -40°C to +125°C 8
Common-mode rejection ratio CMRR 120 140 dB (V-), 0.1 V < VCM < (V+), 3 V 8
Common-mode rejection ratio CMRR 114 126 dB (V-) < VCM < (V+), 3 V, TA = -40°C to +125°C 8
Common-mode rejection ratio CMRR 100 120 dB (V+), 1.5 V < VCM < (V+) 8
Common-mode rejection ratio CMRR 86 100 dB TA = -40°C to +125°C 8
Open-loop voltage gain AOL 120 134 dB (V-) + 0.6 V < VO < (V+), 0.6 V, RL = 2 kΩ 9
Open-loop voltage gain AOL 114 126 dB TA = -40°C to +125°C 9
Open-loop voltage gain AOL 126 140 dB (V-) + 0.3 V < VO < (V+), 0.3 V, RL = 10 kΩ 9
Voltage output swing from rail, positive rail VO 5 15 mV No load 9
Voltage output swing from rail, positive rail VO 95 110 mV RL = 10 kΩ 9
Voltage output swing from rail, positive rail VO 430 500 mV RL = 2 kΩ 9
Voltage output swing from rail, negative rail VO 5 15 mV No load 9
Voltage output swing from rail, negative rail VO 95 110 mV RL = 10 kΩ 9
Voltage output swing from rail, negative rail VO 430 500 mV RL = 2 kΩ 9
Short-circuit current ISC -65 65 mA 9
Quiescent current per amplifier IQ 1 1.2 mA IO = 0 A 9
Quiescent current per amplifier IQ 1.5 mA TA = -40°C to +125°C 9
Input offset voltage VOS -250 5 250 µV VCM = (V+), 3 V 10
Input offset voltage VOS -350 8 350 µV TA = 0°C to 85°C 10
Input offset voltage VOS -400 10 400 µV TA = -40°C to +125°C 10
Input offset voltage VOS -250 10 250 µV VCM = (V+), 1.5 V 10
Input offset voltage drift dVOS/dT -2.5 0.5 2.5 µV/°C VCM = (V+), 3 V, TA = -40°C to +125°C 10
Power-supply rejection ratio PSRR -2 2 µV/V TA = -40°C to +125°C 10
Common-mode rejection ratio CMRR 94 110 dB (V-), 0.1 V < VCM < (V+), 3 V 10
Common-mode rejection ratio CMRR 90 104 dB TA = -40°C to +125°C 10
Common-mode rejection ratio CMRR 100 120 dB (V+), 1.5 V < VCM < (V+) 10
Common-mode rejection ratio CMRR 84 100 dB TA = -40°C to +125°C 10
Open-loop voltage gain AOL 110 120 dB (V-) + 0.6 V < VO < (V+), 0.6 V, RL = 2 kΩ 11
Open-loop voltage gain AOL 100 114 dB TA = -40°C to +125°C 11
Open-loop voltage gain AOL 110 126 dB (V-) + 0.3 V < VO < (V+), 0.3 V, RL = 10 kΩ 11
Quiescent current per amplifier IQ 1 1.2 mA IO = 0 A 11
Quiescent current per amplifier IQ 1.5 mA TA = -40°C to +125°C 11

CAD (KiCad official)

  • Symbol: OPA4197QPWRQ1
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: opa4197qpwrq1-etched.step / opa4197qpwrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); opa4197qpwrq1.step / opa4197qpwrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 4f2179e3927233fd, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF